From d0e0205bfc5a147f8744a176a10f185af7520c26 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Tue, 21 May 2024 15:56:38 +0200 Subject: [PATCH] [InstCombine] Check for poison instead of undef in single shuffle fold Otherwise we'll convert undef to poison. Alive2 was already flagging the existing test8 test as a miscompile. --- .../InstCombine/InstCombineVectorOps.cpp | 2 +- llvm/test/CodeGen/PowerPC/vec_shuffle.ll | 10 +++++----- .../InstCombine/vec_shuffle-inseltpoison.ll | 17 +++++++++++++++++ llvm/test/Transforms/InstCombine/vec_shuffle.ll | 5 +++-- 4 files changed, 26 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp index 9dcd9ef07d74f1..86e162e2f55d4f 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp @@ -619,7 +619,7 @@ static bool collectSingleShuffleElements(Value *V, Value *LHS, Value *RHS, "Invalid CollectSingleShuffleElements"); unsigned NumElts = cast(V->getType())->getNumElements(); - if (match(V, m_Undef())) { + if (match(V, m_Poison())) { Mask.assign(NumElts, -1); return true; } diff --git a/llvm/test/CodeGen/PowerPC/vec_shuffle.ll b/llvm/test/CodeGen/PowerPC/vec_shuffle.ll index e698ab1e15a912..22b5ff0d21cbda 100644 --- a/llvm/test/CodeGen/PowerPC/vec_shuffle.ll +++ b/llvm/test/CodeGen/PowerPC/vec_shuffle.ll @@ -32,7 +32,7 @@ entry: %tmp15 = extractelement <16 x i8> %tmp2.upgrd.2, i32 2 ; [#uses=1] %tmp16 = extractelement <16 x i8> %tmp2.upgrd.2, i32 3 ; [#uses=1] %tmp17 = extractelement <16 x i8> %tmp2.upgrd.2, i32 4 ; [#uses=1] - %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.3, i32 0 ; <<16 x i8>> [#uses=1] + %tmp18 = insertelement <16 x i8> poison, i8 %tmp.upgrd.3, i32 0 ; <<16 x i8>> [#uses=1] %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1] %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1] %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1] @@ -80,7 +80,7 @@ define void @VSLDOI_xx(ptr %A, ptr %B) { %tmp15 = extractelement <16 x i8> %tmp2.upgrd.6, i32 2 ; [#uses=1] %tmp16 = extractelement <16 x i8> %tmp2.upgrd.6, i32 3 ; [#uses=1] %tmp17 = extractelement <16 x i8> %tmp2.upgrd.6, i32 4 ; [#uses=1] - %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.7, i32 0 ; <<16 x i8>> [#uses=1] + %tmp18 = insertelement <16 x i8> poison, i8 %tmp.upgrd.7, i32 0 ; <<16 x i8>> [#uses=1] %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1] %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1] %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1] @@ -150,7 +150,7 @@ entry: %tmp15 = extractelement <16 x i8> %tmp2, i32 14 ; [#uses=1] %tmp16 = extractelement <16 x i8> %tmp, i32 15 ; [#uses=1] %tmp17 = extractelement <16 x i8> %tmp2, i32 15 ; [#uses=1] - %tmp18 = insertelement <16 x i8> undef, i8 %tmp.upgrd.12, i32 0 ; <<16 x i8>> [#uses=1] + %tmp18 = insertelement <16 x i8> poison, i8 %tmp.upgrd.12, i32 0 ; <<16 x i8>> [#uses=1] %tmp19 = insertelement <16 x i8> %tmp18, i8 %tmp3, i32 1 ; <<16 x i8>> [#uses=1] %tmp20 = insertelement <16 x i8> %tmp19, i8 %tmp4, i32 2 ; <<16 x i8>> [#uses=1] %tmp21 = insertelement <16 x i8> %tmp20, i8 %tmp5, i32 3 ; <<16 x i8>> [#uses=1] @@ -189,7 +189,7 @@ entry: %tmp7 = extractelement <8 x i16> %tmp2, i32 6 ; [#uses=1] %tmp8 = extractelement <8 x i16> %tmp, i32 7 ; [#uses=1] %tmp9 = extractelement <8 x i16> %tmp2, i32 7 ; [#uses=1] - %tmp10 = insertelement <8 x i16> undef, i16 %tmp.upgrd.13, i32 0 ; <<8 x i16>> [#uses=1] + %tmp10 = insertelement <8 x i16> poison, i16 %tmp.upgrd.13, i32 0 ; <<8 x i16>> [#uses=1] %tmp11 = insertelement <8 x i16> %tmp10, i16 %tmp3, i32 1 ; <<8 x i16>> [#uses=1] %tmp12 = insertelement <8 x i16> %tmp11, i16 %tmp4, i32 2 ; <<8 x i16>> [#uses=1] %tmp13 = insertelement <8 x i16> %tmp12, i16 %tmp5, i32 3 ; <<8 x i16>> [#uses=1] @@ -216,7 +216,7 @@ entry: %tmp3 = extractelement <4 x i32> %tmp2, i32 2 ; [#uses=1] %tmp4 = extractelement <4 x i32> %tmp, i32 3 ; [#uses=1] %tmp5 = extractelement <4 x i32> %tmp2, i32 3 ; [#uses=1] - %tmp6 = insertelement <4 x i32> undef, i32 %tmp.upgrd.14, i32 0 ; <<4 x i32>> [#uses=1] + %tmp6 = insertelement <4 x i32> poison, i32 %tmp.upgrd.14, i32 0 ; <<4 x i32>> [#uses=1] %tmp7 = insertelement <4 x i32> %tmp6, i32 %tmp3, i32 1 ; <<4 x i32>> [#uses=1] %tmp8 = insertelement <4 x i32> %tmp7, i32 %tmp4, i32 2 ; <<4 x i32>> [#uses=1] %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1] diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll index ef085d3e7b50bf..a9cdc8bd202476 100644 --- a/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle-inseltpoison.ll @@ -87,6 +87,23 @@ define <4 x float> @test8(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @test8( ; CHECK-NEXT: [[T134:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T134]] +; + %t4 = extractelement <4 x float> %x, i32 1 + %t2 = extractelement <4 x float> %x, i32 3 + %t1 = extractelement <4 x float> %y, i32 0 + %t128 = insertelement <4 x float> poison, float %t4, i32 0 + %t130 = insertelement <4 x float> %t128, float poison, i32 1 + %t132 = insertelement <4 x float> %t130, float %t2, i32 2 + %t134 = insertelement <4 x float> %t132, float %t1, i32 3 + ret <4 x float> %t134 +} + +; This shouldn't turn into a single shuffle +define <4 x float> @test8_undef(<4 x float> %x, <4 x float> %y) { +; CHECK-LABEL: @test8_undef( +; CHECK-NEXT: [[T132:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> , <4 x i32> +; CHECK-NEXT: [[T134:%.*]] = shufflevector <4 x float> [[T132]], <4 x float> [[Y:%.*]], <4 x i32> +; CHECK-NEXT: ret <4 x float> [[T134]] ; %t4 = extractelement <4 x float> %x, i32 1 %t2 = extractelement <4 x float> %x, i32 3 diff --git a/llvm/test/Transforms/InstCombine/vec_shuffle.ll b/llvm/test/Transforms/InstCombine/vec_shuffle.ll index 4d7e9d9067e753..8c91efb473faec 100644 --- a/llvm/test/Transforms/InstCombine/vec_shuffle.ll +++ b/llvm/test/Transforms/InstCombine/vec_shuffle.ll @@ -88,10 +88,11 @@ define <4 x float> @test7(<4 x float> %x) { ret <4 x float> %r } -; This should turn into a single shuffle. +; This should not turn into a single shuffle. define <4 x float> @test8(<4 x float> %x, <4 x float> %y) { ; CHECK-LABEL: @test8( -; CHECK-NEXT: [[T134:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x i32> +; CHECK-NEXT: [[T132:%.*]] = shufflevector <4 x float> [[X:%.*]], <4 x float> , <4 x i32> +; CHECK-NEXT: [[T134:%.*]] = shufflevector <4 x float> [[T132]], <4 x float> [[Y:%.*]], <4 x i32> ; CHECK-NEXT: ret <4 x float> [[T134]] ; %t4 = extractelement <4 x float> %x, i32 1