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[ARM] Check all terms in emitPopInst when clearing Restored for LR. #75527

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Dec 20, 2023
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18 changes: 15 additions & 3 deletions llvm/lib/Target/ARM/ARMFrameLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1645,9 +1645,21 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB,
// Fold the return instruction into the LDM.
DeleteRet = true;
LdmOpc = AFI->isThumbFunction() ? ARM::t2LDMIA_RET : ARM::LDMIA_RET;
// We 'restore' LR into PC so it is not live out of the return block:
// Clear Restored bit.
Info.setRestored(false);
// Check if all terminators do not implicitly use LR. Then we can
// 'restore' LR into PC so it is not live out of the return block: Clear
// Restored bit.
if (all_of(MF, [MI](const MachineBasicBlock &MBB) {
return all_of(MBB.terminators(), [MI](const MachineInstr &Term) {
// MI's terminator is to be re-written, don't check the old
// opcode.
if (&*MI == &Term)
return true;
return Term.getOpcode() == ARM::LDMIA_RET ||
Term.getOpcode() == ARM::t2LDMIA_RET ||
Term.getOpcode() == ARM::tPOP_RET;
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Should we checking for isReturn()? This is going to reject any block containing a branch.

Checking all blocks here is O(N^2) in the number of epilogues; can we move this later somehow?

There's corresponding code in Thumb1FrameLowering.cpp which needs a similar fix.

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Thanks, I added an isReturn check in the latest version and moved setting IsRestored to processFunctionBeforeFrameFinalized, which runs just after spilling the callee-saved registers

});
}))
Info.setRestored(false);
}

// If NoGap is true, pop consecutive registers and then leave the rest
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/Thumb2/mve-float16regloops.ll
Original file line number Diff line number Diff line change
Expand Up @@ -831,6 +831,7 @@ define void @arm_fir_f32_1_4_mve(ptr nocapture readonly %S, ptr nocapture readon
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: .LBB15_10: @ %while.end55
; CHECK-NEXT: ands r1, r9, #3
; CHECK-NEXT: @ implicit-def: $lr
; CHECK-NEXT: beq .LBB15_12
; CHECK-NEXT: @ %bb.11: @ %if.then59
; CHECK-NEXT: vldrw.u32 q0, [r0]
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1 change: 1 addition & 0 deletions llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
Original file line number Diff line number Diff line change
Expand Up @@ -822,6 +822,7 @@ define void @arm_fir_f32_1_4_mve(ptr nocapture readonly %S, ptr nocapture readon
; CHECK-NEXT: mov r0, r1
; CHECK-NEXT: .LBB15_10: @ %while.end55
; CHECK-NEXT: ands r1, r10, #3
; CHECK-NEXT: @ implicit-def: $lr
; CHECK-NEXT: beq .LBB15_12
; CHECK-NEXT: @ %bb.11: @ %if.then59
; CHECK-NEXT: vldrw.u32 q0, [r0]
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12 changes: 10 additions & 2 deletions llvm/test/CodeGen/Thumb2/outlined-fn-may-clobber-lr-in-caller.ll
Original file line number Diff line number Diff line change
Expand Up @@ -22,11 +22,19 @@ define void @test(ptr nocapture noundef writeonly %arg, i32 noundef %arg1, i8 no
; CHECK-NEXT: cmp r1, #1
; CHECK-NEXT: bne .LBB0_5
; CHECK-NEXT: @ %bb.2: @ %bb4
; CHECK-NEXT: bl OUTLINED_FUNCTION_0
; CHECK-NEXT: movs r1, #1
; CHECK-NEXT: strb.w r1, [r0, #36]
; CHECK-NEXT: movs r1, #30
; CHECK-NEXT: strb.w r1, [r0, #34]
; CHECK-NEXT: add.w r1, r2, r2, lsl #3
; CHECK-NEXT: ldr r2, .LCPI0_1
; CHECK-NEXT: b .LBB0_4
; CHECK-NEXT: .LBB0_3: @ %bb14
; CHECK-NEXT: bl OUTLINED_FUNCTION_0
; CHECK-NEXT: movs r1, #1
; CHECK-NEXT: strb.w r1, [r0, #36]
; CHECK-NEXT: movs r1, #30
; CHECK-NEXT: strb.w r1, [r0, #34]
; CHECK-NEXT: add.w r1, r2, r2, lsl #3
; CHECK-NEXT: ldr r2, .LCPI0_0
; CHECK-NEXT: .LBB0_4: @ %bb4
; CHECK-NEXT: add.w r1, r2, r1, lsl #2
Expand Down