From 01622053a0e8b442265e38c7e2484dc29b2185f9 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Fri, 23 Feb 2024 00:34:44 +0800 Subject: [PATCH 1/2] [Loads] Fix crash in isSafeToLoadUnconditionally with scalable accessed type This fixes #82606 by updating isSafeToLoadUnconditionally to handle fixed sized loads from a scalable accessed type. --- llvm/lib/Analysis/Loads.cpp | 6 ++--- .../VectorCombine/RISCV/load-widening.ll | 22 +++++++++++++++++++ 2 files changed, 25 insertions(+), 3 deletions(-) create mode 100644 llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll diff --git a/llvm/lib/Analysis/Loads.cpp b/llvm/lib/Analysis/Loads.cpp index 6bf0d2f56eb4eb..5916d2ab48ecec 100644 --- a/llvm/lib/Analysis/Loads.cpp +++ b/llvm/lib/Analysis/Loads.cpp @@ -364,7 +364,7 @@ bool llvm::isSafeToLoadUnconditionally(Value *V, Align Alignment, APInt &Size, if (Size.getBitWidth() > 64) return false; - const uint64_t LoadSize = Size.getZExtValue(); + const TypeSize LoadSize = TypeSize::getFixed(Size.getZExtValue()); // Otherwise, be a little bit aggressive by scanning the local block where we // want to check to see if the pointer is already being loaded or stored @@ -414,11 +414,11 @@ bool llvm::isSafeToLoadUnconditionally(Value *V, Align Alignment, APInt &Size, // Handle trivial cases. if (AccessedPtr == V && - LoadSize <= DL.getTypeStoreSize(AccessedTy)) + TypeSize::isKnownLE(LoadSize, DL.getTypeStoreSize(AccessedTy))) return true; if (AreEquivalentAddressValues(AccessedPtr->stripPointerCasts(), V) && - LoadSize <= DL.getTypeStoreSize(AccessedTy)) + TypeSize::isKnownLE(LoadSize, DL.getTypeStoreSize(AccessedTy))) return true; } return false; diff --git a/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll b/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll new file mode 100644 index 00000000000000..49d0d4216c52b2 --- /dev/null +++ b/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll @@ -0,0 +1,22 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV32 +; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV64 + +define void @fixed_load_scalable_src() { +; CHECK-LABEL: define void @fixed_load_scalable_src( +; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: entry: +; CHECK-NEXT: store zeroinitializer, ptr null, align 8 +; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr null, align 8 +; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> zeroinitializer, <8 x i32> +; CHECK-NEXT: ret void +; +entry: + store zeroinitializer, ptr null + %0 = load <4 x i16>, ptr null + %1 = shufflevector <4 x i16> %0, <4 x i16> zeroinitializer, <8 x i32> + ret void +} +;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: +; RV32: {{.*}} +; RV64: {{.*}} From 87e7b031bc621cb41533580876cee9cb43667dc2 Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Fri, 23 Feb 2024 01:44:58 +0800 Subject: [PATCH 2/2] Use actual pointer instead of null, remove check prefixes --- .../VectorCombine/RISCV/load-widening.ll | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll b/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll index 49d0d4216c52b2..0a43ad2f9a3684 100644 --- a/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll +++ b/llvm/test/Transforms/VectorCombine/RISCV/load-widening.ll @@ -1,22 +1,19 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 -; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv32 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV32 -; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv64 -mattr=+v | FileCheck %s -check-prefixes=CHECK,RV64 +; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv32 -mattr=+v | FileCheck %s +; RUN: opt < %s -passes=vector-combine -S -mtriple=riscv64 -mattr=+v | FileCheck %s -define void @fixed_load_scalable_src() { +define void @fixed_load_scalable_src(ptr %p) { ; CHECK-LABEL: define void @fixed_load_scalable_src( -; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +; CHECK-SAME: ptr [[P:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: entry: -; CHECK-NEXT: store zeroinitializer, ptr null, align 8 -; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr null, align 8 +; CHECK-NEXT: store zeroinitializer, ptr [[P]], align 8 +; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[P]], align 8 ; CHECK-NEXT: [[TMP1:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> zeroinitializer, <8 x i32> ; CHECK-NEXT: ret void ; entry: - store zeroinitializer, ptr null - %0 = load <4 x i16>, ptr null + store zeroinitializer, ptr %p + %0 = load <4 x i16>, ptr %p %1 = shufflevector <4 x i16> %0, <4 x i16> zeroinitializer, <8 x i32> ret void } -;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line: -; RV32: {{.*}} -; RV64: {{.*}}