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ElfRelocationAndNote.lgc
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ElfRelocationAndNote.lgc
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; This test case checks that no empty relocation section is generated when there
; is no relocation. It also checks the ISA name is correctly generated in the
; .note section.
; RUN: lgc -mcpu=gfx802 -extract=2 -filetype=obj -o %t.vs.elf %s
; RUN: lgc -mcpu=gfx802 -extract=3 -filetype=obj -o %t.fs.elf %s
; RUN: lgc -mcpu=gfx802 -extract=1 -l -o %t.pipe.elf %s %t.vs.elf %t.fs.elf
; RUN: llvm-readelf %t.pipe.elf --section-headers --elf-output-style=LLVM | FileCheck %s --check-prefix=EMPTY
; RUN: llvm-objdump -sj .note %t.pipe.elf | FileCheck %s --check-prefix=ISA
; EMPTY-NOT: .rel.text
; ISA: amdgcn--amdpal--
; ISA-NEXT: gfx802
; ----------------------------------------------------------------------
; Extract 1: The pipeline state with no shaders.
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
target triple = "amdgcn--amdpal"
!lgc.options = !{!0}
!lgc.options.VS = !{!1}
!lgc.options.FS = !{!2}
!lgc.user.data.nodes = !{!3, !4, !5, !6}
!lgc.vertex.inputs = !{!7, !8, !9, !10, !11, !12}
!lgc.color.export.formats = !{!13}
!lgc.input.assembly.state = !{!14}
!lgc.viewport.state = !{!15}
!lgc.rasterizer.state = !{!16}
!0 = !{i32 -1620978931, i32 620550714, i32 -100642976, i32 -196492550, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2}
!1 = !{i32 1951548461, i32 273960056, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 64, i32 0, i32 15, i32 3}
!2 = !{i32 1072849668, i32 -352651751, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 64, i32 0, i32 15, i32 3}
!3 = !{!"DescriptorTableVaPtr", i32 0, i32 1, i32 2}
!4 = !{!"DescriptorBuffer", i32 0, i32 4, i32 0, i32 0, i32 4}
!5 = !{!"DescriptorCombinedTexture", i32 4, i32 12, i32 0, i32 1, i32 12}
!6 = !{!"IndirectUserDataVaPtr", i32 1, i32 1, i32 4}
!7 = !{i32 0, i32 0, i32 0, i32 76, i32 13, i32 7, i32 -1}
!8 = !{i32 1, i32 0, i32 12, i32 76, i32 13, i32 7, i32 -1}
!9 = !{i32 2, i32 0, i32 24, i32 76, i32 11, i32 7, i32 -1}
!10 = !{i32 3, i32 0, i32 32, i32 76, i32 13, i32 7, i32 -1}
!11 = !{i32 4, i32 0, i32 44, i32 76, i32 14, i32 7, i32 -1}
!12 = !{i32 5, i32 0, i32 60, i32 76, i32 14, i32 5, i32 -1}
!13 = !{i32 16}
!14 = !{i32 2, i32 3}
!15 = !{i32 1}
!16 = !{i32 0, i32 0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 2, i32 1}
!17 = !{i32 0}
!18 = !{i32 4}
; ----------------------------------------------------------------------
; Extract 2: The vertex shader
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
target triple = "amdgcn--amdpal"
; Function Attrs: nounwind
define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc.shaderstage !0 {
.entry:
%0 = call <4 x i32> (...) @lgc.create.read.generic.input.v4i32(i32 5, i32 0, i32 0, i32 0, i32 0, i32 undef)
%bc = bitcast <4 x i32> %0 to <4 x float>
%1 = shufflevector <4 x float> %bc, <4 x float> undef, <3 x i32> <i32 3, i32 3, i32 3>
call void (...) @lgc.create.write.generic.output(<3 x float> %1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef)
ret void
}
; Function Attrs: nounwind readonly
declare <4 x i32> @lgc.create.read.generic.input.v4i32(...) local_unnamed_addr #1
; Function Attrs: nounwind
declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0
attributes #0 = { nounwind }
attributes #1 = { nounwind readonly }
!lgc.unlinked = !{!0}
!lgc.options = !{!1}
!lgc.options.VS = !{!2}
!lgc.input.assembly.state = !{!4}
!0 = !{i32 1}
!1 = !{i32 628083063, i32 1661573491, i32 -2141117829, i32 766255606, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2}
!2 = !{i32 1951548461, i32 273960056, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 64, i32 0, i32 0, i32 3}
!4 = !{i32 2, i32 3}
; ----------------------------------------------------------------------
; Extract 3: The fragment shader
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
target triple = "amdgcn--amdpal"
; Function Attrs: nounwind
define dllexport spir_func void @lgc.shader.FS.main() local_unnamed_addr #0 !lgc.shaderstage !5 {
.entry:
call void (...) @lgc.create.write.generic.output(<4 x float> <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01>, i32 0, i32 0, i32 0, i32 0, i32 0, i32 undef)
ret void
}
; Function Attrs: nounwind
declare void @lgc.create.write.generic.output(...) local_unnamed_addr #0
attributes #0 = { nounwind }
!lgc.unlinked = !{!0}
!lgc.options = !{!1}
!lgc.options.FS = !{!2}
!lgc.color.export.formats = !{!3}
!lgc.input.assembly.state = !{!4}
!0 = !{i32 1}
!1 = !{i32 -794913950, i32 -27741903, i32 1278784547, i32 441582842, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 2}
!2 = !{i32 1072849668, i32 -352651751, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 64, i32 0, i32 0, i32 3}
!3 = !{i32 14, i32 7}
!4 = !{i32 0, i32 3}
!5 = !{i32 6}