TaskShaderRegConfig.lgc

; Test that relevant registers of task shader are built as expected.

; RUN: lgc -mcpu=gfx1030 -o=- - <%s | FileCheck --check-prefixes=CHECK %s

; In this test case, we check if relevant registers of a task shader is built correctly.
;
; CHECK-LABEL: .registers:
; CHECK: (COMPUTE_NUM_THREAD_X): 0x20
; CHECK: (COMPUTE_NUM_THREAD_Y): 0x1
; CHECK: (COMPUTE_NUM_THREAD_Z): 0x1
; CHECK: (COMPUTE_PGM_RSRC1):
; CHECK: (COMPUTE_PGM_RSRC2):
; CHECK: (COMPUTE_PGM_RSRC3):
; CHECK: (COMPUTE_SHADER_CHKSUM):
; CHECK: (COMPUTE_USER_DATA_0): 0x10000000
; CHECK: (COMPUTE_USER_DATA_2): 0x10000012
; CHECK: (COMPUTE_USER_DATA_5): 0x10000013
; CHECK: (COMPUTE_USER_DATA_6): 0x10000014

; ModuleID = 'lgcPipeline'
source_filename = "llpctask1"
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn--amdpal"

; Function Attrs: nounwind
define dllexport spir_func void @lgc.shader.TASK.main() local_unnamed_addr #0 !lgc.shaderstage !7 {
.entry:
  ret void
}

attributes #0 = { nounwind }

!llpc.compute.mode = !{!0}
!lgc.client = !{!1}
!lgc.unlinked = !{!2}
!lgc.options = !{!3}
!lgc.options.TASK = !{!4}
!lgc.input.assembly.state = !{!5}
!amdgpu.pal.metadata.msgpack = !{!6}

!0 = !{i32 32, i32 1, i32 1}
!1 = !{!"Vulkan"}
!2 = !{i32 1}
!3 = !{i32 -818902704, i32 391257630, i32 857742121, i32 -2057576994, i32 1, i32 0, i32 0, i32 552, i32 0, i32 0, i32 1, i32 256, i32 256, i32 2}
!4 = !{i32 1926140008, i32 -922063099, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 64, i32 0, i32 0, i32 3, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 20, i32 1800}
!5 = !{i32 0, i32 3}
!6 = !{!"\82\B0amdpal.pipelines\91\84\AA.registers\80\B0.spill_threshold\CE\FF\FF\FF\FF\B0.user_data_limit\00\AF.xgl_cache_info\82\B3.128_bit_cache_hash\92\CF*\B3\1C8\12\A8\7F\8D\CF\0B\01_tf\C7\1A\C5\AD.llpc_version\A452.2\AEamdpal.version\92\02\03"}
!7 = !{i32 0}