STM32H7 noinit RAM Section Woes #1110
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I've not used the backup SRAM before. I believe it is powered by its own power and clock domain, so maybe check that those are really correctly enabled in the RCC (the early If you want to be sure that it's not the startup script writing there, you can remove the |
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I've been fighting a SRAM memory problem for days now. I've carved out a 32-byte hole in memory to hold messages between the boot loader and main application that will persist across MCU reset cycles.
I already had this working in my F4 implementation and didn't consider it to be a big deal. I was wrong.
For this H7 version, I chose the 4 KB battery backed SRAM block at 0x3880,0000. Even though I don't need battery backup, this seemed like a good fit for the purpose. And it gave me the option of battery backup in the future, and allows growth of the shared memory block without any impact to the main memory layout of the application.
But things didn't work well at all. I'm seeing all kind of weirdness. Some things I'm seeing suggest I'm still not handling the write cache and/or other setups properly. But another bug makes me additionally suspect the linker or the startup code. I will often, but not always, observe the last two bytes of the buffer get corrupted.
It occurs to me that the logical meaning of a NOINIT section doesn't explicitly mean "don't touch this section, even at startup before the program begins"
Has anyone conquered the successful use of this SRAM region?
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