External Latch Support (8 bit parallel mode) #226
Replies: 5 comments 4 replies
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I am working on a new project and wanted to integrate your library into my hardware. I could test the Latch too, something really good could come of it. I am currently using an ESP32-WROOM-32D module, but almost abandoned it to replace it with an ESP32-PICO-V3-02 |
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The use of an 8-bit latch is only really of value if there is a need for:
If this library is to implement latch support, the first thing that needs to be designed is a open source 'sheild' similar to Doesn't seem to be a real use case for an 8-bit shield, as it seems most people just want to drive one or two panels in a chain. |
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I'd definitely be interested in this. [edit: spelling] |
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I am running out of pins so I am interested in the latch option :) I thought the S3 would solve my problem but it has no Bluetooth Classic… and some other issues ;) I am currently going through a PCB design course so if I know what is needed here I can probably put something together :) |
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With S3 support now working we really should try and design a ESP32-S3 adaptor for this device that supports TWO chains of panels in parallel. This is possible from my analysis. There's just enough pins for 16 bits / 2 x 8 bits in parallel when also supporting all the additonal pins required for QSPI. If espressif get PSRAM support working properly then this will be a gamechanger for being able to have very large displays from this one little device. |
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Tracking potential enhancement #180 here.
Will need to think about this as the ESP32 (2017 edition) is horrible for TX FIFO byte reordering in 8 bit mode.
Much easier on S2 where bytes won't get messed around (FIFO is actually FIFO).
Will need to implement compiler conditional code depending on MCU type (WROOM, S2/3, C3/H2).
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