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[Question] How to get RF24 library working with ATTiny84 ( SpenceKonde - ATTinyCore ) ? #567

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3xtr3m3d opened this issue Jan 28, 2020 · 4 comments
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@3xtr3m3d
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Hi

I have wired NRF24L01 module as follow

ATTiny84-|- RF24
PA6-------|- MISO
PA5-------|- MOSI
PA4-------|- SCK
PA3-------|- CSN
PA2-------|- CE

and staring library like this

#define CE_PIN 2
#define CSN_PIN 3
#include "RF24.h"
RF24 radio(CE_PIN, CSN_PIN);

Using SpenceKonde attinycore RF module doesn't work. (tried clockwise and counter clockwise pinouts) without changing any wiring, i tried arduino 1.6.4 with damellis attiny core and RF module works.

is there anyway to get it working with this SpenceKonde attinycore? because lot of other stuff i want is missing in working core.

Regards

@nopnop2002
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This library has the following code for ATtiny.

//ATTiny support code pulled in from https://github.com/jscrane/RF24
#if defined(RF24_TINY)

void SPIClass::begin() {
    // set USCK and DO for output
    // set DI for input
        #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
    DDRB |= (1 << PB2) | (1 << PB1);
    DDRB &= ~(1 << PB0);
        #elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
    DDRA |= (1 << PA4) | (1 << PA5);
    DDRA &= ~(1 << PA6);
        #elif defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny4313__)
    DDRB |= (1 << PB7) | (1 << PB6);
    DDRB &= ~(1 << PB5);
        #elif defined(__AVR_ATtiny861__)
    DDRB |= (1 << PB2) | (1 << PB1);
    DDRB &= ~(1 << PB0);
        #endif // defined(__AVR_ATtiny861__)
    USICR = _BV(USIWM0);
}

byte SPIClass::transfer(byte b)
{
    USIDR = b;
    USISR = _BV(USIOIF);
    do {
        USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
    }
    while ((USISR & _BV(USIOIF)) == 0);
    return USIDR;
}

void SPIClass::end() {}
void SPIClass::setDataMode(uint8_t mode){}
void SPIClass::setBitOrder(uint8_t bitOrder){}
void SPIClass::setClockDivider(uint8_t rate){}

#endif

You can use the following libraries instead of this code:
https://github.com/JChristensen/tinySPI

@3xtr3m3d
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3xtr3m3d commented Feb 4, 2020

This library has the following code for ATtiny.

//ATTiny support code pulled in from https://github.com/jscrane/RF24
#if defined(RF24_TINY)

void SPIClass::begin() {
    // set USCK and DO for output
    // set DI for input
        #if defined(__AVR_ATtiny25__) || defined(__AVR_ATtiny45__) || defined(__AVR_ATtiny85__)
    DDRB |= (1 << PB2) | (1 << PB1);
    DDRB &= ~(1 << PB0);
        #elif defined(__AVR_ATtiny24__) || defined(__AVR_ATtiny44__) || defined(__AVR_ATtiny84__)
    DDRA |= (1 << PA4) | (1 << PA5);
    DDRA &= ~(1 << PA6);
        #elif defined(__AVR_ATtiny2313__) || defined(__AVR_ATtiny4313__)
    DDRB |= (1 << PB7) | (1 << PB6);
    DDRB &= ~(1 << PB5);
        #elif defined(__AVR_ATtiny861__)
    DDRB |= (1 << PB2) | (1 << PB1);
    DDRB &= ~(1 << PB0);
        #endif // defined(__AVR_ATtiny861__)
    USICR = _BV(USIWM0);
}

byte SPIClass::transfer(byte b)
{
    USIDR = b;
    USISR = _BV(USIOIF);
    do {
        USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
    }
    while ((USISR & _BV(USIOIF)) == 0);
    return USIDR;
}

void SPIClass::end() {}
void SPIClass::setDataMode(uint8_t mode){}
void SPIClass::setBitOrder(uint8_t bitOrder){}
void SPIClass::setClockDivider(uint8_t rate){}

#endif

You can use the following libraries instead of this code:
https://github.com/JChristensen/tinySPI

thanks i will check

@2bndy5
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2bndy5 commented Oct 27, 2020

this repo now compiles with the SpenceKonde ATTiny core due to changes made by @jscrane in the recently merged #646 Stay tuned for the next release...

@2bndy5
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2bndy5 commented Dec 14, 2020

Use v1.3.10 or later with the SpenceKonde ATTinyCore in Arduino IDE.

@2bndy5 2bndy5 closed this as completed Dec 14, 2020
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