From 923b19d3a15ea2fd2b2da624660edf3d3370bd0a Mon Sep 17 00:00:00 2001 From: watney Date: Thu, 8 Aug 2024 16:59:38 -0700 Subject: [PATCH 1/5] Complete code generation for state machine instances that have priority and full queue behavior --- .../Analyzers/TypeExpressionAnalyzer.scala | 8 ++ .../analysis/Analyzers/UseAnalyzer.scala | 7 +- .../Semantics/StateMachineInstance.scala | 18 ++- .../ComponentCppWriterUtils.scala | 3 + .../ComponentStateMachines.scala | 49 +++++--- .../lib/src/main/scala/util/Version.scala | 2 +- .../test/state_machine_instance/ok.fpp | 9 +- .../ActiveStateMachinesComponentAc.ref.cpp | 105 ++++++++++++++++-- .../ActiveStateMachinesComponentAc.ref.hpp | 8 ++ .../component/include/state_machines.fppi | 14 ++- .../fpp-to-json/test/activeComponents.ref.txt | 12 ++ 11 files changed, 198 insertions(+), 37 deletions(-) diff --git a/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala b/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala index f608004c2..03ba60dd5 100644 --- a/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala +++ b/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala @@ -184,6 +184,14 @@ trait TypeExpressionAnalyzer } yield a } + override def specStateMachineInstanceAnnotatedNode(a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecStateMachineInstance]]) = { + val (_, node1, _) = node + val data = node1.data + for { + a <- opt(exprNode)(a, data.priority) + } yield a + } + override def specParamAnnotatedNode(a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecParam]]) = { val (_, node1, _) = node val data = node1.data diff --git a/compiler/lib/src/main/scala/analysis/Analyzers/UseAnalyzer.scala b/compiler/lib/src/main/scala/analysis/Analyzers/UseAnalyzer.scala index 5d78ec39f..332eff355 100644 --- a/compiler/lib/src/main/scala/analysis/Analyzers/UseAnalyzer.scala +++ b/compiler/lib/src/main/scala/analysis/Analyzers/UseAnalyzer.scala @@ -68,10 +68,13 @@ trait UseAnalyzer extends TypeExpressionAnalyzer { override def specStateMachineInstanceAnnotatedNode(a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecStateMachineInstance]]) = { val (_, node1, _) = node val data = node1.data - qualIdentNode(stateMachineUse)(a, data.stateMachine) + for { + a <- opt(exprNode)(a, data.priority) + a <- qualIdentNode(stateMachineUse)(a, data.stateMachine) + } yield a } - + override def specConnectionGraphAnnotatedNode( a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecConnectionGraph]]) = { def connection(a: Analysis, connection: Ast.SpecConnectionGraph.Connection): Result = { diff --git a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala index 97484fb02..2c70563a1 100644 --- a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala +++ b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala @@ -2,11 +2,18 @@ package fpp.compiler.analysis import fpp.compiler.ast._ import fpp.compiler.util._ +import fpp.compiler.ast.Ast.ExprLiteralInt +import fpp.compiler.ast.Ast.QueueFull.Assert +import fpp.compiler.ast.Ast.QueueFull.Block +import fpp.compiler.ast.Ast.QueueFull.Drop +import fpp.compiler.ast.Ast.QueueFull /** An FPP state machine instance */ final case class StateMachineInstance( aNode: Ast.Annotated[AstNode[Ast.SpecStateMachineInstance]], - symbol: Symbol.StateMachine + symbol: Symbol.StateMachine, + priority: Option[BigInt], + queueFull: Ast.QueueFull ) { /** Gets the location of the state machine instance*/ @@ -25,7 +32,12 @@ object StateMachineInstance { def fromSpecStateMachine(a: Analysis, aNode: Ast.Annotated[AstNode[Ast.SpecStateMachineInstance]] ) : Result.Result[StateMachineInstance] = { - val qid = aNode._2.data.stateMachine + val data = aNode._2.data + val qid = data.stateMachine + val priorityNode = data.priority + val priority = a.getBigIntValueOpt(priorityNode) + val queueFull = Analysis.getQueueFull(data.queueFull) + for { symbol <- a.useDefMap(qid.id) match { case symbol @ Symbol.StateMachine(_) => Right(symbol) @@ -37,7 +49,7 @@ object StateMachineInstance { )) } } - yield StateMachineInstance(aNode, symbol) + yield StateMachineInstance(aNode, symbol, priority, queueFull) } } diff --git a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala index bc8521c5a..16cfa92ec 100644 --- a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala +++ b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala @@ -110,6 +110,9 @@ abstract class ComponentCppWriterUtils( /** List of serial output ports */ val serialOutputPorts: List[PortInstance.General] = filterSerialPorts(outputPorts) + /** List of state machine instances */ + val stateMachineInstances: List[StateMachineInstance] = component.stateMachineInstanceMap.toList.map((_, sm) => sm) + /** List of internal port instances sorted by name */ val internalPorts: List[PortInstance.Internal] = component.portMap.toList.map((_, p) => p match { case i: PortInstance.Internal => Some(i) diff --git a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala index 1b8712180..521422525 100644 --- a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala +++ b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala @@ -22,20 +22,19 @@ case class ComponentStateMachines( guardedList (hasStateMachineInstances) (List(lcm)) } - def getFunctionMembers: List[CppDoc.Class.Member] = { - lazy val member = functionClassMember( - Some(s"State machine base-class function for sendSignals"), - "stateMachineInvoke", - List( - CppDoc.Function.Param( - CppDoc.Type("const Fw::SMSignals&"), - "ev", - Some("The state machine signal") - ) - ), - CppDoc.Type("void"), - intersperseBlankLines( - List( + def getFunctionMembers: List[CppDoc.Class.Member] = { + val writeMessages = stateMachineInstances.flatMap{sm => + lines( + s"""| + |case STATE_MACHINE_${sm.getUnqualifiedName.toUpperCase}: { + """ + ) ++ + writeSendMessageLogic("msg", sm.queueFull, sm.priority).map(indentIn) ++ + List(Line("break;")).map(indentIn) ++ + List(Line("}")) + } + + val serializeCode = lines( s"""|ComponentIpcSerializableBuffer msg; |Fw::SerializeStatus _status = Fw::FW_SERIALIZE_OK; @@ -60,12 +59,30 @@ case class ComponentStateMachines( | static_cast(_status) |); | + |switch (ev.getsmId()) { |""" - ), - writeSendMessageLogic("msg", Ast.QueueFull.Assert, Option(1)) + ) + + val member = functionClassMember( + Some(s"State machine base-class function for sendSignals"), + "stateMachineInvoke", + List( + CppDoc.Function.Param( + CppDoc.Type("const Fw::SMSignals&"), + "ev", + Some("The state machine signal") + ) + ), + CppDoc.Type("void"), + intersperseBlankLines( + List( + serializeCode ++ + writeMessages.map(indentIn) ++ + lines("}") ) ) ) + addAccessTagAndComment( "PROTECTED", "State machine function to push signals to the input queue", diff --git a/compiler/lib/src/main/scala/util/Version.scala b/compiler/lib/src/main/scala/util/Version.scala index 64899096b..0073e05cc 100644 --- a/compiler/lib/src/main/scala/util/Version.scala +++ b/compiler/lib/src/main/scala/util/Version.scala @@ -3,6 +3,6 @@ package fpp.compiler.util /** The compiler version */ object Version { - val v = "v2.1.0-198-gd63e805b" + val v = "v2.1.0-199-g4b7456f1" } diff --git a/compiler/tools/fpp-check/test/state_machine_instance/ok.fpp b/compiler/tools/fpp-check/test/state_machine_instance/ok.fpp index bc4f5972e..6dcece5e9 100644 --- a/compiler/tools/fpp-check/test/state_machine_instance/ok.fpp +++ b/compiler/tools/fpp-check/test/state_machine_instance/ok.fpp @@ -8,8 +8,11 @@ active component C { state machine S - state machine instance s1: M.S - state machine instance s2: T - state machine instance s3: S + state machine instance s1: M.S priority 1 block + state machine instance s2: T priority 2 drop + state machine instance s3: S priority 3 assert + state machine instance s4: S priority 3+1 block + state machine instance s5: S priority 3+2 + state machine instance s6: S } diff --git a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp index 6e477d5d8..e56360f72 100644 --- a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp +++ b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp @@ -78,6 +78,8 @@ void ActiveStateMachinesComponentBase :: m_stateMachine_sm2.init(); m_stateMachine_sm3.init(); m_stateMachine_sm4.init(); + m_stateMachine_sm5.init(); + m_stateMachine_sm6.init(); Os::Queue::QueueStatus qStat = this->createQueue( queueDepth, @@ -99,7 +101,9 @@ ActiveStateMachinesComponentBase :: m_stateMachine_sm1(this), m_stateMachine_sm2(this), m_stateMachine_sm3(this), - m_stateMachine_sm4(this) + m_stateMachine_sm4(this), + m_stateMachine_sm5(this), + m_stateMachine_sm6(this) { } @@ -140,14 +144,91 @@ void ActiveStateMachinesComponentBase :: static_cast(_status) ); - // Send message - Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; - Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block); + switch (ev.getsmId()) { - FW_ASSERT( - qStatus == Os::Queue::QUEUE_OK, - static_cast(qStatus) - ); + case STATE_MACHINE_SM2: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 2, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + + case STATE_MACHINE_SM3: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 3, _block); + + if (qStatus == Os::Queue::QUEUE_FULL) { + this->incNumMsgDropped(); + return; + } + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + + case STATE_MACHINE_SM6: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + + case STATE_MACHINE_SM5: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + + case STATE_MACHINE_SM1: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + + case STATE_MACHINE_SM4: { + + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 4, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } + } } // ---------------------------------------------------------------------- @@ -230,6 +311,14 @@ Fw::QueuedComponentBase::MsgDispatchStatus ActiveStateMachinesComponentBase :: this->m_stateMachine_sm4.update(&ev); break; + case STATE_MACHINE_SM5: + this->m_stateMachine_sm5.update(&ev); + break; + + case STATE_MACHINE_SM6: + this->m_stateMachine_sm6.update(&ev); + break; + } break; diff --git a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.hpp b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.hpp index e5f9f0a30..9382decb1 100644 --- a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.hpp +++ b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.hpp @@ -42,6 +42,8 @@ class ActiveStateMachinesComponentBase : STATE_MACHINE_SM2, STATE_MACHINE_SM3, STATE_MACHINE_SM4, + STATE_MACHINE_SM5, + STATE_MACHINE_SM6, }; public: @@ -108,6 +110,12 @@ class ActiveStateMachinesComponentBase : //! State machine sm4 ActiveStateMachines_S2 m_stateMachine_sm4; + //! State machine sm5 + ActiveStateMachines_S2 m_stateMachine_sm5; + + //! State machine sm6 + ActiveStateMachines_S2 m_stateMachine_sm6; + }; #endif diff --git a/compiler/tools/fpp-to-cpp/test/component/include/state_machines.fppi b/compiler/tools/fpp-to-cpp/test/component/include/state_machines.fppi index e4983473e..c751d4a84 100644 --- a/compiler/tools/fpp-to-cpp/test/component/include/state_machines.fppi +++ b/compiler/tools/fpp-to-cpp/test/component/include/state_machines.fppi @@ -11,14 +11,20 @@ state machine S2 # ---------------------------------------------------------------------- @ state machine sm1 -state machine instance sm1: S1 +state machine instance sm1: S1 priority 1 block @ state machine sm2 -state machine instance sm2: S1 +state machine instance sm2: S1 priority 2 assert @ state machine sm3 -state machine instance sm3: S2 +state machine instance sm3: S2 priority 2+1 drop @ state machine sm4 -state machine instance sm4: S2 +state machine instance sm4: S2 priority 5-1 + +@ state machine sm5 +state machine instance sm5: S2 block + +@ state machine sm6 +state machine instance sm6: S2 diff --git a/compiler/tools/fpp-to-json/test/activeComponents.ref.txt b/compiler/tools/fpp-to-json/test/activeComponents.ref.txt index c96fa5552..e3643ae7b 100644 --- a/compiler/tools/fpp-to-json/test/activeComponents.ref.txt +++ b/compiler/tools/fpp-to-json/test/activeComponents.ref.txt @@ -1284,6 +1284,12 @@ "node" : { "astNodeId" : 52 } + }, + "priority" : "None", + "queueFull" : { + "Assert" : { + + } } }, "s2" : { @@ -1294,6 +1300,12 @@ "node" : { "astNodeId" : 52 } + }, + "priority" : "None", + "queueFull" : { + "Assert" : { + + } } } }, From f342cdddd43c2cd66468381edad9765c3f2ea288 Mon Sep 17 00:00:00 2001 From: watney Date: Thu, 8 Aug 2024 17:50:38 -0700 Subject: [PATCH 2/5] Remove commented out code --- .../scala/analysis/Analyzers/TypeExpressionAnalyzer.scala | 8 -------- 1 file changed, 8 deletions(-) diff --git a/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala b/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala index efafbe85b..71af9fafa 100644 --- a/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala +++ b/compiler/lib/src/main/scala/analysis/Analyzers/TypeExpressionAnalyzer.scala @@ -184,14 +184,6 @@ trait TypeExpressionAnalyzer } yield a } - // override def specStateMachineInstanceAnnotatedNode(a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecStateMachineInstance]]) = { - // val (_, node1, _) = node - // val data = node1.data - // for { - // a <- opt(exprNode)(a, data.priority) - // } yield a - // } - override def specParamAnnotatedNode(a: Analysis, node: Ast.Annotated[AstNode[Ast.SpecParam]]) = { val (_, node1, _) = node val data = node1.data From 68ef067ee5510a3a3811c72e8ff1abe697abd49c Mon Sep 17 00:00:00 2001 From: Rob Bocchino Date: Mon, 12 Aug 2024 09:19:49 -0700 Subject: [PATCH 3/5] Code cleanup --- .../main/scala/analysis/Semantics/StateMachineInstance.scala | 5 ----- compiler/lib/src/main/scala/util/Version.scala | 2 +- 2 files changed, 1 insertion(+), 6 deletions(-) diff --git a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala index 2c70563a1..1189d674b 100644 --- a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala +++ b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala @@ -2,11 +2,6 @@ package fpp.compiler.analysis import fpp.compiler.ast._ import fpp.compiler.util._ -import fpp.compiler.ast.Ast.ExprLiteralInt -import fpp.compiler.ast.Ast.QueueFull.Assert -import fpp.compiler.ast.Ast.QueueFull.Block -import fpp.compiler.ast.Ast.QueueFull.Drop -import fpp.compiler.ast.Ast.QueueFull /** An FPP state machine instance */ final case class StateMachineInstance( diff --git a/compiler/lib/src/main/scala/util/Version.scala b/compiler/lib/src/main/scala/util/Version.scala index d12d69957..5e1209628 100644 --- a/compiler/lib/src/main/scala/util/Version.scala +++ b/compiler/lib/src/main/scala/util/Version.scala @@ -3,6 +3,6 @@ package fpp.compiler.util /** The compiler version */ object Version { - val v = "v2.1.0-208-g1350eca4" + val v = "[unknown version]" } From 454f33e24191461448afc17171106d91a66dbd5f Mon Sep 17 00:00:00 2001 From: Rob Bocchino Date: Mon, 12 Aug 2024 09:37:44 -0700 Subject: [PATCH 4/5] Code cleanup --- .../ComponentCppWriter/ComponentStateMachines.scala | 12 ++++-------- .../base/ActiveStateMachinesComponentAc.ref.cpp | 1 + 2 files changed, 5 insertions(+), 8 deletions(-) diff --git a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala index 521422525..6f4302ee2 100644 --- a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala +++ b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala @@ -57,10 +57,7 @@ case class ComponentStateMachines( |FW_ASSERT( | _status == Fw::FW_SERIALIZE_OK, | static_cast(_status) - |); - | - |switch (ev.getsmId()) { - |""" + |);""" ) val member = functionClassMember( @@ -74,11 +71,10 @@ case class ComponentStateMachines( ) ), CppDoc.Type("void"), - intersperseBlankLines( + Line.blank :: intersperseBlankLines( List( - serializeCode ++ - writeMessages.map(indentIn) ++ - lines("}") + serializeCode, + wrapInSwitch("ev.getsmId()", writeMessages) ) ) ) diff --git a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp index e56360f72..8e6505d4e 100644 --- a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp +++ b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp @@ -121,6 +121,7 @@ ActiveStateMachinesComponentBase :: void ActiveStateMachinesComponentBase :: stateMachineInvoke(const Fw::SMSignals& ev) { + ComponentIpcSerializableBuffer msg; Fw::SerializeStatus _status = Fw::FW_SERIALIZE_OK; From e076bd84668d9bdd3e08599956d8dbf9c07ee575 Mon Sep 17 00:00:00 2001 From: Rob Bocchino Date: Mon, 12 Aug 2024 10:15:59 -0700 Subject: [PATCH 5/5] Revise state machine code gen --- .../scala/analysis/Semantics/Component.scala | 2 +- .../Semantics/StateMachineInstance.scala | 4 +- .../ComponentCppWriterUtils.scala | 3 +- .../ComponentStateMachines.scala | 47 +++++++++++++------ .../ActiveStateMachinesComponentAc.ref.cpp | 43 +++++++++-------- 5 files changed, 58 insertions(+), 41 deletions(-) diff --git a/compiler/lib/src/main/scala/analysis/Semantics/Component.scala b/compiler/lib/src/main/scala/analysis/Semantics/Component.scala index cb6265cf0..c259ce08e 100644 --- a/compiler/lib/src/main/scala/analysis/Semantics/Component.scala +++ b/compiler/lib/src/main/scala/analysis/Semantics/Component.scala @@ -132,7 +132,7 @@ case class Component( /** Add a port instance to the port map */ private def updateStateMachineInstanceMap(instance: StateMachineInstance): Result.Result[Component] = { - val name = instance.getUnqualifiedName + val name = instance.getName stateMachineInstanceMap.get(name) match { case Some(prevInstance) => val loc = instance.getLoc diff --git a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala index 1189d674b..12f39355a 100644 --- a/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala +++ b/compiler/lib/src/main/scala/analysis/Semantics/StateMachineInstance.scala @@ -16,8 +16,8 @@ final case class StateMachineInstance( def getNodeId = aNode._2.id - /** Gets the unqualified name of the state machine instance */ - def getUnqualifiedName = aNode._2.data.name + /** Gets the name of the state machine instance */ + def getName = aNode._2.data.name } diff --git a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala index 16cfa92ec..9dbd21689 100644 --- a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala +++ b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentCppWriterUtils.scala @@ -111,7 +111,8 @@ abstract class ComponentCppWriterUtils( val serialOutputPorts: List[PortInstance.General] = filterSerialPorts(outputPorts) /** List of state machine instances */ - val stateMachineInstances: List[StateMachineInstance] = component.stateMachineInstanceMap.toList.map((_, sm) => sm) + val stateMachineInstances: List[StateMachineInstance] = + component.stateMachineInstanceMap.toList.map((_, sm) => sm).sortBy(_.getName) /** List of internal port instances sorted by name */ val internalPorts: List[PortInstance.Internal] = component.portMap.toList.map((_, p) => p match { diff --git a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala index 6f4302ee2..c6eb44b26 100644 --- a/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala +++ b/compiler/lib/src/main/scala/codegen/CppWriter/ComponentCppWriter/ComponentStateMachines.scala @@ -23,17 +23,6 @@ case class ComponentStateMachines( } def getFunctionMembers: List[CppDoc.Class.Member] = { - val writeMessages = stateMachineInstances.flatMap{sm => - lines( - s"""| - |case STATE_MACHINE_${sm.getUnqualifiedName.toUpperCase}: { - """ - ) ++ - writeSendMessageLogic("msg", sm.queueFull, sm.priority).map(indentIn) ++ - List(Line("break;")).map(indentIn) ++ - List(Line("}")) - } - val serializeCode = lines( s"""|ComponentIpcSerializableBuffer msg; @@ -60,6 +49,37 @@ case class ComponentStateMachines( |);""" ) + + val switchCode = List.concat( + lines("const U32 smId = ev.getsmId();"), + wrapInSwitch( + "smId", + List.concat( + stateMachineInstances.flatMap( + smi => { + Line.blank :: + wrapInScope( + s"case STATE_MACHINE_${smi.getName.toUpperCase}: {", + List.concat( + writeSendMessageLogic("msg", smi.queueFull, smi.priority), + lines("break;") + ), + "}" + ) + } + ), + lines( + """| + |default: + | FW_ASSERT(0, static_cast(smId)); + | break; + |""" + ) + + ) + ) + ) + val member = functionClassMember( Some(s"State machine base-class function for sendSignals"), "stateMachineInvoke", @@ -72,10 +92,7 @@ case class ComponentStateMachines( ), CppDoc.Type("void"), Line.blank :: intersperseBlankLines( - List( - serializeCode, - wrapInSwitch("ev.getsmId()", writeMessages) - ) + List(serializeCode, switchCode) ) ) diff --git a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp index 8e6505d4e..93bb08a4e 100644 --- a/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp +++ b/compiler/tools/fpp-to-cpp/test/component/base/ActiveStateMachinesComponentAc.ref.cpp @@ -145,10 +145,22 @@ void ActiveStateMachinesComponentBase :: static_cast(_status) ); - switch (ev.getsmId()) { + const U32 smId = ev.getsmId(); + switch (smId) { + + case STATE_MACHINE_SM1: { + // Send message + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block); + + FW_ASSERT( + qStatus == Os::Queue::QUEUE_OK, + static_cast(qStatus) + ); + break; + } case STATE_MACHINE_SM2: { - // Send message Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 2, _block); @@ -161,7 +173,6 @@ void ActiveStateMachinesComponentBase :: } case STATE_MACHINE_SM3: { - // Send message Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 3, _block); @@ -178,11 +189,10 @@ void ActiveStateMachinesComponentBase :: break; } - case STATE_MACHINE_SM6: { - + case STATE_MACHINE_SM4: { // Send message Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; - Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block); + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 4, _block); FW_ASSERT( qStatus == Os::Queue::QUEUE_OK, @@ -192,7 +202,6 @@ void ActiveStateMachinesComponentBase :: } case STATE_MACHINE_SM5: { - // Send message Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING; Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block); @@ -204,11 +213,10 @@ void ActiveStateMachinesComponentBase :: break; } - case STATE_MACHINE_SM1: { - + case STATE_MACHINE_SM6: { // Send message - Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_BLOCKING; - Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 1, _block); + Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; + Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 0, _block); FW_ASSERT( qStatus == Os::Queue::QUEUE_OK, @@ -217,18 +225,9 @@ void ActiveStateMachinesComponentBase :: break; } - case STATE_MACHINE_SM4: { - - // Send message - Os::Queue::QueueBlocking _block = Os::Queue::QUEUE_NONBLOCKING; - Os::Queue::QueueStatus qStatus = this->m_queue.send(msg, 4, _block); - - FW_ASSERT( - qStatus == Os::Queue::QUEUE_OK, - static_cast(qStatus) - ); + default: + FW_ASSERT(0, static_cast(smId)); break; - } } }