stage_bound_ram.qip

set_global_assignment -name IP_TOOL_NAME "RAM: 2-PORT"
set_global_assignment -name IP_TOOL_VERSION "18.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{MAX 10}"
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "stage_bound_ram.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "stage_bound_ram_bb.v"]