From 142ce6838beda039ca118650b2a7eb0d3714c9d8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C3=ABl=20Zasso?= Date: Sat, 10 Jul 2021 13:10:39 +0200 Subject: [PATCH] deps: V8: cherry-pick 3805a698f7b6 Original commit message: PPC/s390: [wasm][liftoff] Always zero-extend 32 bit offsets Port 2b77ca200c56667c68895e49c96c10ff77834f09 Original Commit Message: The upper 32 bits of the 64 bit offset register are not guaranteed to be cleared, so a zero-extension is needed. We already do the zero-extension in the case of explicit bounds checking, but this should also be done if the trap handler is enabled. R=thibaudm@chromium.org, joransiu@ca.ibm.com, junyan@redhat.com, midawson@redhat.com BUG= LOG=N Change-Id: Ife3ae4f93b85fe1b2c76fe4b98fa408b5b51ed71 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/2929661 Reviewed-by: Junliang Yan Commit-Queue: Milad Fa Cr-Commit-Position: refs/heads/master@{#74886} Refs: https://github.com/v8/v8/commit/3805a698f7b6803dd6ee002cfdda71296c71b30b PR-URL: https://github.com/nodejs/node/pull/39337 Reviewed-By: Matteo Collina Reviewed-By: James M Snell --- common.gypi | 2 +- deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h | 3 ++- deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h | 8 +++++++- 3 files changed, 10 insertions(+), 3 deletions(-) diff --git a/common.gypi b/common.gypi index 36e5de56341a51..88764c8f6b75a8 100644 --- a/common.gypi +++ b/common.gypi @@ -36,7 +36,7 @@ # Reset this number to 0 on major V8 upgrades. # Increment by one for each non-official patch applied to deps/v8. - 'v8_embedder_string': '-node.17', + 'v8_embedder_string': '-node.18', ##### V8 defaults for Node.js ##### diff --git a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h index 4e99821a27d563..bedee1a939c007 100644 --- a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h +++ b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc.h @@ -137,7 +137,8 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, - uint32_t* protected_load_pc, bool is_load_mem) { + uint32_t* protected_load_pc, bool is_load_mem, + bool i64_offset) { bailout(kUnsupportedArchitecture, "Load"); } diff --git a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h index 8560c91553f8cc..04f30939fdbab6 100644 --- a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h +++ b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h @@ -277,11 +277,17 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst_addr, void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, Register offset_reg, uintptr_t offset_imm, LoadType type, LiftoffRegList pinned, - uint32_t* protected_load_pc, bool is_load_mem) { + uint32_t* protected_load_pc, bool is_load_mem, + bool i64_offset) { UseScratchRegisterScope temps(this); if (!is_int20(offset_imm)) { mov(ip, Operand(offset_imm)); if (offset_reg != no_reg) { + if (!i64_offset) { + // Clear the upper 32 bits of the 64 bit offset register. + llgfr(r0, offset_reg); + offset_reg = r0; + } AddS64(ip, offset_reg); } offset_reg = ip;