From bd688882614b02688e265037f945f619ffd0b4b8 Mon Sep 17 00:00:00 2001
From: kxxt <rsworktech@outlook.com>
Date: Tue, 11 Jun 2024 13:30:25 +0800
Subject: [PATCH] deps: V8: cherry-pick a3cc8522a4c8
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Original commit message:

    [riscv] avoid cpu probing in li_ptr

    CPU probing is an expensive thing to do and we should avoid doing it upon every li_ptr call.

    Fixes performance regresion bisected in https://github.com/riscv-forks/electron/issues/1

    Change-Id: Ib5ff89b2a730e08de6735123ae60adeffe811ed8
    Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/5612950
    Commit-Queue: Yahan Lu <yahan@iscas.ac.cn>
    Reviewed-by: Yahan Lu <yahan@iscas.ac.cn>
    Reviewed-by: Michael Lippautz <mlippautz@chromium.org>
    Cr-Commit-Position: refs/heads/main@{#94349}

Refs: https://github.com/v8/v8/commit/a3cc8522a4c82e6d76bcd134c01dc04c55c6fdd2
PR-URL: https://github.com/nodejs/node/pull/53412
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
Reviewed-By: Michaël Zasso <targos@protonmail.com>
Reviewed-By: Richard Lau <rlau@redhat.com>
Reviewed-By: Marco Ippolito <marcoippolito54@gmail.com>
Reviewed-By: Rafael Gonzaga <rafael.nunu@hotmail.com>
Reviewed-By: Luigi Pinca <luigipinca@gmail.com>
---
 common.gypi                                  | 2 +-
 deps/v8/AUTHORS                              | 1 +
 deps/v8/src/codegen/riscv/assembler-riscv.cc | 1 -
 3 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/common.gypi b/common.gypi
index f0c4a5a09f8d4f..6f29ec5681eac9 100644
--- a/common.gypi
+++ b/common.gypi
@@ -36,7 +36,7 @@
 
     # Reset this number to 0 on major V8 upgrades.
     # Increment by one for each non-official patch applied to deps/v8.
-    'v8_embedder_string': '-node.14',
+    'v8_embedder_string': '-node.15',
 
     ##### V8 defaults for Node.js #####
 
diff --git a/deps/v8/AUTHORS b/deps/v8/AUTHORS
index 6de30c78a85421..54fb45992db176 100644
--- a/deps/v8/AUTHORS
+++ b/deps/v8/AUTHORS
@@ -181,6 +181,7 @@ Kevin Gibbons <bakkot@gmail.com>
 Keyhan Vakil <kvakil@googlecontrib.kvakil.me>
 Kris Selden <kris.selden@gmail.com>
 Kyounga Ra <kyounga@alticast.com>
+Levi Zim <rsworktech@outlook.com>
 Loo Rong Jie <loorongjie@gmail.com>
 Lu Yahan <yahan@iscas.ac.cn>
 Ludovic Mermod <ludovic.mermod@gmail.com>
diff --git a/deps/v8/src/codegen/riscv/assembler-riscv.cc b/deps/v8/src/codegen/riscv/assembler-riscv.cc
index e794c434224cec..73125fdfee1542 100644
--- a/deps/v8/src/codegen/riscv/assembler-riscv.cc
+++ b/deps/v8/src/codegen/riscv/assembler-riscv.cc
@@ -1087,7 +1087,6 @@ void Assembler::GeneralLi(Register rd, int64_t imm) {
 }
 
 void Assembler::li_ptr(Register rd, int64_t imm) {
-  base::CPU cpu;
   // Initialize rd with an address
   // Pointers are 48 bits
   // 6 fixed instructions are generated