From ff9f1545e259f5bfb70b57f6c6b5f18162981407 Mon Sep 17 00:00:00 2001
From: ethan-000 <s2026080@ed.ac.uk>
Date: Fri, 18 Aug 2023 13:46:26 +0100
Subject: [PATCH] remove log

---
 .../src/ssa/acir_gen/acir_ir/generated_acir.rs            | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/crates/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs b/crates/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
index 8fc46db2b1a..b695978211a 100644
--- a/crates/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
+++ b/crates/noirc_evaluator/src/ssa/acir_gen/acir_ir/generated_acir.rs
@@ -12,7 +12,6 @@ use acvm::acir::{
     brillig::Opcode as BrilligOpcode,
     circuit::{
         brillig::{Brillig as AcvmBrillig, BrilligInputs, BrilligOutputs},
-        directives::LogInfo,
         opcodes::{BlackBoxFuncCall, FunctionInput, Opcode as AcirOpcode},
     },
     native_types::Witness,
@@ -567,13 +566,6 @@ impl GeneratedAcir {
         &expr_squared - expr
     }
 
-    /// Adds a log directive to print the provided witnesses.
-    ///
-    /// Logging of strings is currently unsupported.
-    pub(crate) fn call_print(&mut self, witnesses: Vec<Witness>) {
-        self.push_opcode(AcirOpcode::Directive(Directive::Log(LogInfo::WitnessOutput(witnesses))));
-    }
-
     /// Adds an inversion brillig opcode.
     ///
     /// This code will invert `expr` without applying constraints