diff --git a/src/arm/cpu-arm.cc b/src/arm/cpu-arm.cc
index 2eb1aee63d5..c0898bca86a 100644
--- a/src/arm/cpu-arm.cc
+++ b/src/arm/cpu-arm.cc
@@ -19,7 +19,10 @@
 namespace v8 {
 namespace internal {
 
-void CpuFeatures::FlushICache(void* start, size_t size) {
+// The inlining of this seems to trigger an LTO bug that clobbers a register on
+// arm, see https://crbug.com/952759#c6.
+__attribute__((noinline)) void CpuFeatures::FlushICache(void* start,
+                                                        size_t size) {
 #if !defined(USE_SIMULATOR)
 #if V8_OS_QNX
   msync(start, size, MS_SYNC | MS_INVALIDATE_ICACHE);
diff --git a/src/wasm/wasm-code-manager.cc b/src/wasm/wasm-code-manager.cc
index a1a604e2162..c874aa0f698 100644
--- a/src/wasm/wasm-code-manager.cc
+++ b/src/wasm/wasm-code-manager.cc
@@ -718,9 +718,6 @@ std::unique_ptr<WasmCode> NativeModule::AddCodeWithCodeSpace(
     }
   }
 
-  // Flush the i-cache after relocation.
-  FlushInstructionCache(dst_code_bytes.start(), dst_code_bytes.size());
-
   std::unique_ptr<WasmCode> code{new WasmCode{
       this, index, dst_code_bytes, stack_slots, tagged_parameter_slots,
       safepoint_table_offset, handler_table_offset, constant_pool_offset,
@@ -731,6 +728,11 @@ std::unique_ptr<WasmCode> NativeModule::AddCodeWithCodeSpace(
 
   code->RegisterTrapHandlerData();
 
+  // Flush the i-cache for the region holding the relocated code.
+  // Do this last, as this seems to trigger an LTO bug that clobbers a register
+  // on arm, see https://crbug.com/952759#c6.
+  FlushInstructionCache(dst_code_bytes.start(), dst_code_bytes.size());
+
   return code;
 }