Layout for a circuit

[mimoo]

WARNING: Random idea

I've noticed that we reuse ZK_ROWS in a number of places, and it's not always clear what rows of the domain are here because they're part of the circuit, or part of ZK_ROWS, or part of a boundary/additional constraint.

I'm creating this thread as a "hey maybe that could be a good idea, but I haven't really thought about it". Perhaps each argument could be define such that it's a list of type of constraint. Something like this:

let circuit_rows = vec![
  Rows { len: n, typ: circuit },
  Rows { len: EVALS, typ: zk_rows },
];

let lookup_rows = vec![
  Rows { len: concatened_tables_len, typ: entries },
  Rows { len: 1, typ: final_acc },
  Rows { len: EVALS, typ: zk_rows },
];

Eventually, we would use this to make sure that some constraints are only applied on some rows (and multiply with lagrange basis automatically), and that we don't pad the circuit with zero gates several times for no good reason (for example, to add ZK_ROWS to multiple arguments, when they can share the same ZK_ROWS).