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Codegen error with AVX-512BW #4377
Comments
Looks like you also need avx512vl enabled to make codegen happy. |
Could be this, which they say may be fixed in LLVM 19: llvm/llvm-project#111380 |
There are a lot of different ways to make the codegen happy, too. Setting optimization flags sometimes does it, changing the microarch sometimes does it (even if it's one that doesn't support AVX-512)... probably others too. This is extremely sensitive to compiler flags. |
Optimization modes makes sense because it probably just removes the entire function because the program doesn't have any side effects, it is very hard to get llvm (with optimizations) to behave in a bug reproduction because it can just remove things. And even if you get it to not remove your function it could be optimizing it to very different instructions. The microarch affecting it is a little weird, especially if it doesn't enable the avx512 features. |
Context
Expected Behavior
The code in the snippet below should compile without issues, and should execute without issues if AVX-512BW is available on the machine.
Current Behavior
When building the code in the snippet below (and other similarly-constructed code involving masks), an LLVM error (see below) is produced and the Odin compiler aborts. This only happens when relevant parts of the AVX-512 instruction set are enabled (in this case
avx512bw
), either via an attribute or via the command-line. When enabling other SIMD instruction sets (e.g.avx2
), the code builds without issue.In the sample code below, this also occurs when swapping
main
for a test procedure with the same body and attempting to run tests (odin test
).Failure Information (for bugs)
Example error:
Pointer values change with each build.
Steps to Reproduce
mre.odin
with the following code:odin build mre.odin -file
).This error also occurs if the
enable_target_feature
attribute is removed and the target feature is enabled via the command-line (-target-features:avx512bw
). This error seems to be highly dependent on compiler flags; it does not occur if-o:size
,-o:speed
, or-o:aggressive
are given, and also only seems to occur with some microarches (e.g. the defaultx86-64-v2
andx86-64-v3
fail,x86-64
andx86-64-v4
work).The text was updated successfully, but these errors were encountered: