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UAPI: move extern C to dediacted ffi_c module #99

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merged 9 commits into from
Dec 11, 2024
Merged

UAPI: move extern C to dediacted ffi_c module #99

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a639d3d
uapi: move C api to ffi_c module
pthierry-ledger Dec 6, 2024
4d35f85
uapi: fix autotest and idle UAPI usage for new FFI-C API
pthierry-ledger Dec 6, 2024
07cb9a6
uapi: adding missing SPDX header
pthierry-ledger Dec 6, 2024
4decf2e
uapi: syscall exit set as always inline
pthierry-ledger Dec 11, 2024
aaa5e2f
uapi: fixing and enhancing crate global documentation
pthierry-ledger Dec 11, 2024
a5dc850
uapi: fixing sleep syscall to properly handle timeout arg
pthierry-ledger Dec 11, 2024
2cb2f25
uapi: fixing fmt
pthierry-ledger Dec 11, 2024
b127562
uapi: fixing clippy complains
pthierry-ledger Dec 11, 2024
8283c46
uapi: make syscalls always inlined
pthierry-ledger Dec 11, 2024
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10 changes: 5 additions & 5 deletions autotest/src/drivers/timer/stm32-basic-timer.c
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Original file line number Diff line number Diff line change
Expand Up @@ -47,7 +47,7 @@ int timer_init(void)
/* enable interrupt update */
reg |= TIM_DIER_UIE;
iowrite32(desc->base_addr + TIM_DIER_REG, reg);
sys_irq_enable(desc->irqn);
__sys_irq_enable(desc->irqn);
return 0;
}

Expand Down Expand Up @@ -77,7 +77,7 @@ int timer_enable_interrupt(void)
/* enable interrupt update */
reg |= TIM_DIER_UIE;
iowrite32(desc->base_addr + TIM_DIER_REG, reg);
sys_irq_enable(desc->irqn);
__sys_irq_enable(desc->irqn);
return 0;
}

Expand Down Expand Up @@ -133,12 +133,12 @@ Status timer_map(devh_t *handle)
{
stm32_timer_desc_t const *desc = stm32_timer_get_desc();
Status res;
res = sys_get_device_handle(desc->label);
res = __sys_get_device_handle(desc->label);
if (res != STATUS_OK) {
goto end;
}
copy_to_user((uint8_t*)handle, sizeof(devh_t));
res = sys_map_dev(*handle);
res = __sys_map_dev(*handle);
if (res != STATUS_OK) {
goto end;
}
Expand All @@ -150,7 +150,7 @@ Status timer_unmap(devh_t handle)
{
stm32_timer_desc_t const *desc = stm32_timer_get_desc();
Status res;
res = sys_unmap_dev(handle);
res = __sys_unmap_dev(handle);
if (res != STATUS_OK) {
goto end;
}
Expand Down
2 changes: 1 addition & 1 deletion autotest/src/main.c
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Original file line number Diff line number Diff line change
Expand Up @@ -86,6 +86,6 @@ void __attribute__((no_stack_protector, used, noreturn)) autotest(uint32_t label


/* all tests finished, leaving */
sys_exit(0);
__sys_exit(0);
__builtin_unreachable();
}
2 changes: 1 addition & 1 deletion autotest/src/printf.c
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Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ static inline void dbgbuffer_display(void)
{
uint16_t len = log_get_dbgbuf_offset();
copy_from_user(log_get_dbgbuf(), len);
sys_log(len);
__sys_log(len);
}


Expand Down
2 changes: 1 addition & 1 deletion autotest/src/ssp.c
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Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@
void __stack_chk_fail(void)
{
/* End of task. NOTE: stack corruption is a serious security issue */
sys_exit(STATUS_CRITICAL);
__sys_exit(STATUS_CRITICAL);
while (1) {
};
}
28 changes: 14 additions & 14 deletions autotest/src/tests/test_cycles.c
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Original file line number Diff line number Diff line change
Expand Up @@ -13,31 +13,31 @@ void test_cycles_duration(void)
uint64_t micro, start, stop;
uint32_t idx;
TEST_START();
/* as svc exchange is zeroified by sys_log usage,
/* as svc exchange is zeroified by __sys_log usage,
* and because logging is impacting the duration, we first
* get all the values, and then assert them
*/
/* rearm quantum first */
sys_yield();
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_sched_yield();
__sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&start, sizeof(uint64_t));
for (idx = 0; idx <= 1000; ++idx) {
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_get_cycle(PRECISION_MICROSECONDS);
}
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&stop, sizeof(uint64_t));

LOG("average get_cycle cost: %lu", (uint32_t)((stop - start) / idx));

/* rearm quantum first */
sys_yield();
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_sched_yield();
__sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&start, sizeof(uint64_t));
for (idx = 0; idx <= 1000; ++idx) {
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&micro, sizeof(uint64_t));
}
sys_get_cycle(PRECISION_MICROSECONDS);
__sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&stop, sizeof(uint64_t));

LOG("average get_cycle+copy cost: %lu", (uint32_t)((stop - start) / idx));
Expand All @@ -52,22 +52,22 @@ void test_cycles_precision(void)
Status cycle_st, milli_st, micro_st, nano_st;
uint64_t milli, micro, nano, cycle;
TEST_START();
/* as svc exchange is zeroified by sys_log usage,
/* as svc exchange is zeroified by __sys_log usage,
* and because logging is impacting the duration, we first
* get all the values, and then assert them
*/
milli_st = sys_get_cycle(PRECISION_MILLISECONDS);
milli_st = __sys_get_cycle(PRECISION_MILLISECONDS);
copy_to_user((uint8_t*)&milli, sizeof(uint64_t));


micro_st = sys_get_cycle(PRECISION_MICROSECONDS);
micro_st = __sys_get_cycle(PRECISION_MICROSECONDS);
copy_to_user((uint8_t*)&micro, sizeof(uint64_t));


nano_st = sys_get_cycle(PRECISION_NANOSECONDS);
nano_st = __sys_get_cycle(PRECISION_NANOSECONDS);
copy_to_user((uint8_t*)&nano, sizeof(uint64_t));

cycle_st = sys_get_cycle(PRECISION_CYCLE);
cycle_st = __sys_get_cycle(PRECISION_CYCLE);


ASSERT_EQ(milli_st, STATUS_OK);
Expand Down
72 changes: 36 additions & 36 deletions autotest/src/tests/test_dma.c
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Original file line number Diff line number Diff line change
Expand Up @@ -17,11 +17,11 @@ static void test_dma_get_handle(dmah_t* d2mstreamh, dmah_t *m2mstreamh)
{
Status res;
TEST_START();
res = sys_get_dma_stream_handle(0x1);
res = __sys_get_dma_stream_handle(0x1);
copy_to_user((uint8_t*)d2mstreamh, sizeof(dmah_t));
ASSERT_EQ(res, STATUS_OK);
LOG("handle is %lx", *d2mstreamh);
res = sys_get_dma_stream_handle(0x2);
res = __sys_get_dma_stream_handle(0x2);
copy_to_user((uint8_t*)m2mstreamh, sizeof(dmah_t));
ASSERT_EQ(res, STATUS_OK);
LOG("handle is %lx", *m2mstreamh);
Expand All @@ -33,7 +33,7 @@ static void test_dma_get_handle_inval(void)
Status res;
dmah_t stream = 0;
TEST_START();
res = sys_get_dma_stream_handle(0x42);
res = __sys_get_dma_stream_handle(0x42);
ASSERT_EQ(res, STATUS_INVALID);
TEST_END();
}
Expand All @@ -42,16 +42,16 @@ static void test_dma_start_stream(dmah_t stream)
{
Status res;
TEST_START();
res = sys_dma_start_stream(stream);
res = __sys_dma_start_stream(stream);
ASSERT_EQ(res, STATUS_INVALID);
res = sys_dma_assign_stream(stream);
res = __sys_dma_assign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
/* assigned, should start */
res = sys_dma_start_stream(stream);
res = __sys_dma_start_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_assign_stream(stream);
res = __sys_dma_assign_stream(stream);
ASSERT_EQ(res, STATUS_INVALID);
res = sys_dma_start_stream(stream);
res = __sys_dma_start_stream(stream);
ASSERT_EQ(res, STATUS_INVALID);
TEST_END();
}
Expand All @@ -60,11 +60,11 @@ static void test_dma_manipulate_stream_badhandle(void)
{
Status res;
TEST_START();
res = sys_dma_start_stream(0);
res = __sys_dma_start_stream(0);
ASSERT_EQ(res, STATUS_INVALID);
res = sys_dma_suspend_stream(0);
res = __sys_dma_suspend_stream(0);
ASSERT_EQ(res, STATUS_INVALID);
res = sys_dma_get_stream_status(0);
res = __sys_dma_get_stream_status(0);
ASSERT_EQ(res, STATUS_INVALID);
TEST_END();
}
Expand All @@ -73,7 +73,7 @@ static void test_dma_get_stream_status(dmah_t stream)
{
Status res;
TEST_START();
res = sys_dma_get_stream_status(stream);
res = __sys_dma_get_stream_status(stream);
ASSERT_EQ(res, STATUS_OK);
TEST_END();
}
Expand All @@ -82,9 +82,9 @@ static void test_dma_stop_stream(dmah_t stream)
{
Status res;
TEST_START();
res = sys_dma_suspend_stream(stream);
res = __sys_dma_suspend_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_unassign_stream(stream);
res = __sys_dma_unassign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
TEST_END();
}
Expand All @@ -93,13 +93,13 @@ static void test_dma_assign_unassign_stream(dmah_t stream)
{
Status res;
TEST_START();
res = sys_dma_assign_stream(stream);
res = __sys_dma_assign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_assign_stream(stream);
res = __sys_dma_assign_stream(stream);
ASSERT_EQ(res, STATUS_INVALID);
res = sys_dma_unassign_stream(stream);
res = __sys_dma_unassign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_unassign_stream(stream);
res = __sys_dma_unassign_stream(stream);
ASSERT_EQ(res, STATUS_INVALID);
TEST_END();
}
Expand All @@ -116,46 +116,46 @@ static void test_dma_start_n_wait_stream(dmah_t stream)
perms |= SHM_PERMISSION_MAP;
int ret_builtin;
TEST_START();
res = sys_get_process_handle(0xbabeUL);
res = __sys_get_process_handle(0xbabeUL);
copy_to_user((uint8_t*)&myself, sizeof(taskh_t));
// preparing shm1 with content
res = sys_get_shm_handle(shms[0].id);
res = __sys_get_shm_handle(shms[0].id);
copy_to_user((uint8_t*)&shm1, sizeof(shmh_t));
ASSERT_EQ(res, STATUS_OK);
res = sys_shm_set_credential(shm1, myself, perms);
res = __sys_shm_set_credential(shm1, myself, perms);
ASSERT_EQ(res, STATUS_OK);
res = sys_map_shm(shm1);
res = __sys_map_shm(shm1);
ASSERT_EQ(res, STATUS_OK);
res = sys_shm_get_infos(shm1);
res = __sys_shm_get_infos(shm1);
copy_to_user((uint8_t*)&shminfos1, sizeof(shm_infos_t));
ASSERT_EQ(res, STATUS_OK);
memset((void*)shminfos1.base, 0xa5, 0x100UL);
// garbaging shm2
res = sys_get_shm_handle(shms[1].id);
res = __sys_get_shm_handle(shms[1].id);
copy_to_user((uint8_t*)&shm2, sizeof(shmh_t));
ASSERT_EQ(res, STATUS_OK);
res = sys_shm_set_credential(shm2, myself, perms);
res = __sys_shm_set_credential(shm2, myself, perms);
ASSERT_EQ(res, STATUS_OK);
res = sys_map_shm(shm2);
res = __sys_map_shm(shm2);
ASSERT_EQ(res, STATUS_OK);
res = sys_shm_get_infos(shm2);
res = __sys_shm_get_infos(shm2);
copy_to_user((uint8_t*)&shminfos2, sizeof(shm_infos_t));
ASSERT_EQ(res, STATUS_OK);
memset((void*)shminfos2.base, 0x42, 0x100UL);
// start stream
res = sys_dma_assign_stream(stream);
res = __sys_dma_assign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_start_stream(stream);
res = __sys_dma_start_stream(stream);
ASSERT_EQ(res, STATUS_OK);
/* wait 50ms for DMA event, should rise in the meantime */
res = sys_wait_for_event(EVENT_TYPE_DMA, -1);
res = __sys_wait_for_event(EVENT_TYPE_DMA, -1);
ASSERT_EQ(res, STATUS_OK);
// compare shm1 with shm2
ret_builtin = memcmp((void*)shminfos1.base, (void*)shminfos2.base, 0x100);
ASSERT_EQ((uint32_t)ret_builtin, 0);
res = sys_dma_suspend_stream(stream);
res = __sys_dma_suspend_stream(stream);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_unassign_stream(stream);
res = __sys_dma_unassign_stream(stream);
ASSERT_EQ(res, STATUS_OK);
TEST_END();
}
Expand All @@ -167,15 +167,15 @@ static void test_dma_get_info(dmah_t stream)
shmh_t shm;
shm_infos_t infos;
TEST_START();
res = sys_get_shm_handle(shms[0].id);
res = __sys_get_shm_handle(shms[0].id);
copy_to_user((uint8_t*)&shm, sizeof(shmh_t));
ASSERT_EQ(res, STATUS_OK);
res = sys_shm_get_infos(shm);
res = __sys_shm_get_infos(shm);
copy_to_user((uint8_t*)&infos, sizeof(shm_infos_t));
ASSERT_EQ(res, STATUS_OK);
res = sys_get_dma_stream_handle(0x1);
res = __sys_get_dma_stream_handle(0x1);
ASSERT_EQ(res, STATUS_OK);
res = sys_dma_get_stream_info(stream);
res = __sys_dma_get_stream_info(stream);
copy_to_user((uint8_t*)&stream_info, sizeof(gpdma_stream_cfg_t));
ASSERT_EQ(res, STATUS_OK);
ASSERT_EQ((uint32_t)stream_info.stream, 112);
Expand Down
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