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platformio.ini
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platformio.ini
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; PlatformIO Project Configuration File https://docs.platformio.org/page/projectconf.html
[platformio]
default_envs = ZuluSCSIv1_0, ZuluSCSIv1_0_mini, ZuluSCSIv1_1_plus, ZuluSCSI_RP2040, ZuluSCSI_RP2040_Audio, ZuluSCSI_Pico, ZuluSCSI_Pico_DaynaPORT, ZuluSCSI_BS2
; Example platform to serve as a base for porting efforts
[env:template]
platform = ststm32
framework = arduino
board = bluepill_f103c8
build_flags =
-Os -Isrc
-DLOGBUFSIZE=512
-DPREFETCH_BUFFER_SIZE=0
-DMAX_SECTOR_SIZE=2048
-DSCSI2SD_BUFFER_SIZE=4096
-DINI_CACHE_SIZE=0
-DUSE_ARDUINO=1
lib_deps =
SdFat=https://github.com/rabbitholecomputing/SdFat#2.2.0-gpt
minIni
ZuluSCSI_platform_template
SCSI2SD
CUEParser
; ZuluSCSI V1.0 hardware platform with GD32F205 CPU.
[env:ZuluSCSIv1_0]
platform = https://github.com/CommunityGD32Cores/platform-gd32.git
board = genericGD32F205VC
board_build.mcu = gd32f205vct6
board_build.core = gd32
board_build.ldscript = lib/ZuluSCSI_platform_GD32F205/zuluscsi_gd32f205.ld
ldscript_bootloader = lib/ZuluSCSI_platform_GD32F205/zuluscsi_gd32f205_btldr.ld
framework = spl
lib_compat_mode = off
lib_deps =
SdFat_NoArduino
minIni
ZuluSCSI_platform_GD32F205
SCSI2SD
CUEParser
GD32F20x_usbfs_library
upload_protocol = stlink
platform_packages = platformio/toolchain-gccarmnoneeabi@1.100301.220327
framework-spl-gd32@https://github.com/CommunityGD32Cores/gd32-pio-spl-package.git
debug_tool = cmsis-dap
extra_scripts = src/build_bootloader.py
debug_build_flags =
-Os -Wall -Wno-sign-compare -ggdb -g3
build_flags =
-Os -Wall -Wno-sign-compare -ggdb -g3 -Isrc
-D__SYSTEM_CLOCK_120M_PLL_IRC8M=120000000
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DPIO_USBFS_DEVICE_CDC
-DZULUSCSI_V1_0
; ZuluSCSI V1.0 mini hardware platform with GD32F205 CPU.
[env:ZuluSCSIv1_0_mini]
extends = env:ZuluSCSIv1_0
build_flags =
-Os -Wall -Wno-sign-compare -ggdb -g3 -Isrc
-D__SYSTEM_CLOCK_120M_PLL_IRC8M=120000000
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DPIO_USBFS_DEVICE_CDC
-DZULUSCSI_V1_0
-DZULUSCSI_V1_0_mini
; ZuluSCSI V1.1+ hardware platforms, this support v1.1, v1.1 ODE, and vl.2
[env:ZuluSCSIv1_1_plus]
extends = env:ZuluSCSIv1_0
build_flags =
-Os -Wall -Wno-sign-compare -ggdb -g3 -Isrc
-D__SYSTEM_CLOCK_120M_PLL_IRC8M=120000000
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DPIO_USBFS_DEVICE_CDC
-DHAS_SDIO_CLASS
-DENABLE_AUDIO_OUTPUT
-DZULUSCSI_V1_1_plus
; ZuluSCSI RP2040 hardware platform, based on the Raspberry Pi foundation RP2040 microcontroller
[env:ZuluSCSI_RP2040]
platform = raspberrypi@1.9.0
framework = arduino
board = ZuluSCSI_RP2040
extra_scripts = src/build_bootloader.py
platform_packages = platformio/toolchain-gccarmnoneeabi@1.100301.220327
board_build.ldscript = lib/ZuluSCSI_platform_RP2040/rp2040.ld
ldscript_bootloader = lib/ZuluSCSI_platform_RP2040/rp2040_btldr.ld
lib_deps =
SdFat=https://github.com/rabbitholecomputing/SdFat#2.2.0-gpt
minIni
ZuluSCSI_platform_RP2040
SCSI2SD
CUEParser
debug_build_flags =
-O2 -ggdb -g3
; The values can be adjusted down to get a debug build to fit in to SRAM
-DLOGBUFSIZE=4096
; -DPREFETCH_BUFFER_SIZE=2048
build_flags =
-O2 -Isrc -ggdb -g3
-Wall -Wno-sign-compare -Wno-ignored-qualifiers
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DHAS_SDIO_CLASS
-DUSE_ARDUINO=1
-DZULUSCSI_V2_0
; ZuluSCSI RP2040 hardware platform, as above, but with audio output support enabled
[env:ZuluSCSI_RP2040_Audio]
extends = env:ZuluSCSI_RP2040
build_flags =
${env:ZuluSCSI_RP2040.build_flags}
-DENABLE_AUDIO_OUTPUT
-DLOGBUFSIZE=8192
; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB
; Part of the ZuluSCSI_RP2040 platform, but with different pins.
[env:ZuluSCSI_Pico]
extends = env:ZuluSCSI_RP2040
build_flags =
-O2 -Isrc -ggdb -g3
-Wall -Wno-sign-compare -Wno-ignored-qualifiers
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DHAS_SDIO_CLASS
-DUSE_ARDUINO=1
-DZULUSCSI_PICO
; Build for the ZuluSCSI Pico carrier board with a Pico-W
; for SCSI DaynaPORT emulation
[env:ZuluSCSI_Pico_DaynaPORT]
platform = https://github.com/maxgerhardt/platform-raspberrypi.git
platform_packages =
framework-arduinopico@https://github.com/rabbitholecomputing/arduino-pico.git#v3.6.0-DaynaPORT
framework = arduino
board = rpipicow
board_build.core = earlephilhower
extra_scripts = src/build_bootloader.py
ldscript_bootloader = lib/ZuluSCSI_platform_RP2040/rp2040_btldr.ld
board_build.ldscript = lib/ZuluSCSI_platform_RP2040/rp2040-daynaport.ld
debug_tool = cmsis-dap
debug_build_flags =
-O2 -ggdb -g3
-DLOGBUFSIZE=4096
-DPREFETCH_BUFFER_SIZE=0
-DSCSI2SD_BUFFER_SIZE=57344
; This controls the depth of 2 x NETWORK_PACKET_MAX_SIZE (1520 bytes)
; For example a queue size of 10 would be 10 x 2 x 1520 = 30400 bytes
-DNETWORK_PACKET_QUEUE_SIZE=10
lib_deps =
SdFat=https://github.com/rabbitholecomputing/SdFat#2.2.0-gpt
minIni
ZuluSCSI_platform_RP2040
SCSI2SD
CUEParser
build_flags =
-O2 -Isrc
-Wall -Wno-sign-compare -Wno-ignored-qualifiers
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DHAS_SDIO_CLASS
-DUSE_ARDUINO=1
-DZULUSCSI_PICO
-DZULUSCSI_NETWORK
-DZULUSCSI_DAYNAPORT
; These take a large portion of the SRAM and can be adjusted
-DLOGBUFSIZE=8192
-DPREFETCH_BUFFER_SIZE=6144
-DSCSI2SD_BUFFER_SIZE=57344
; This controls the depth of 2 x NETWORK_PACKET_MAX_SIZE (1520 bytes)
; For example a queue size of 10 would be 10 x 2 x 1520 = 30400 bytes
-DNETWORK_PACKET_QUEUE_SIZE=18
; build flags mirroring the framework-arduinopico#v3.6.0-DaynaPORT static library build
-DPICO_CYW43_ARCH_POLL=1
-DCYW43_LWIP=0
-DCYW43_USE_OTP_MAC=0
-DPIO_FRAMEWORK_ARDUINO_NO_USB
; Variant of RP2040 platform, based on Raspberry Pico board and a carrier PCB
; Differs in pinout from ZuluSCSI_RP2040 platform, but shares most of the code.
[env:ZuluSCSI_BS2]
extends = env:ZuluSCSI_RP2040
build_flags =
-O2 -Isrc -ggdb -g3
-Wall -Wno-sign-compare -Wno-ignored-qualifiers
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DHAS_SDIO_CLASS
-DUSE_ARDUINO=1
-DZULUSCSI_BS2
; ZuluSCSI F4 hardware platform with GD32F450ZET6 CPU.
[env:ZuluSCSIv1_4]
platform = https://github.com/CommunityGD32Cores/platform-gd32.git
board = genericGD32F450ZE
board_build.mcu = gd32f450zet6
board_build.core = gd32
board_build.ldscript = lib/ZuluSCSI_platform_GD32F450/zuluscsi_gd32f450.ld
ldscript_bootloader = lib/ZuluSCSI_platform_GD32F450/zuluscsi_gd32f450_btldr.ld
framework = spl
lib_compat_mode = off
lib_deps =
GD32F4xx_usbfs_library
SdFat_NoArduino
minIni
ZuluSCSI_platform_GD32F450
SCSI2SD
CUEParser
upload_protocol = stlink
platform_packages =
toolchain-gccarmnoneeabi@1.90201.191206
framework-spl-gd32@https://github.com/CommunityGD32Cores/gd32-pio-spl-package.git
extra_scripts = src/build_bootloader.py
debug_tool = cmsis-dap
debug_build_flags = -Os -ggdb -g3
build_flags =
-Os -Wall -Wno-sign-compare -ggdb -g3 -Isrc
-D__SYSTEM_CLOCK_200M_PLL_IRC16M=200000000
-DSPI_DRIVER_SELECT=3
-DSD_CHIP_SELECT_MODE=2
-DENABLE_DEDICATED_SPI=1
-DHAS_SDIO_CLASS
-DPIO_USBFS_DEVICE_CDC
-DZULUSCSI_V1_4