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This Month in PLCT: Issue 40 (December 1, 2022)

Preface

Time flies and we are closing out 2022. It's a time for reflection and celebration here at PLCT. On December 9, we will hold our 4th PLCT OpenDay event, we look forward to seeing you there. We are seeing a few new faces at the OpenDay, a testimonial to the growth of our crack team of low-level software developers here at the Software Institute.

Featured Items

  • Engineers at the PLCT Lab has submitted SpiderMonkey's RISC-V JIT support to Mozilla. Some further tweaking are still needed but we are hopeful to merge it in Q1 2023 (in time for the Lunar New Year).

V8 for RISC-V

OpenJDK for RV32GC (Shi Ningning [史宁宁])

Patch Submissions

  1. Fix the cmp_l2i in cmpL3_reg_reg openjdk-riscv/jdk11u#561
  2. Fix the fp_args of double in calling_convention openjdk-riscv/jdk11u#562
  3. Fix the count num of double and array in generate_native_wrapper openjdk-riscv/jdk11u#563
  4. Fix the bugs in long cmp of macroAssembler_riscv32.cpp openjdk-riscv/jdk11u#564
  5. Fix the error reg in enc_cmpUEqNeLeGt_imm0_branch_long openjdk-riscv/jdk11u#565
  6. Fix the call_VM_leaf in riscv32.ad openjdk-riscv/jdk11u#568
  7. Fix the error in pr461 openjdk-riscv/jdk11u#569
  8. Add 64bit support for implementation() in riscv32.ad openjdk-riscv/jdk11u#570
  9. Fix the param type in castX2P of riscv32.ad openjdk-riscv/jdk11u#571
  10. Fix the long data in signExtractL of riscv32.ad openjdk-riscv/jdk11u#572
  11. Fix the immLAdd data type errors in riscv32.ad openjdk-riscv/jdk11u#573
  12. Fix the reg error in MoveL2D_reg_reg openjdk-riscv/jdk11u#574
  13. Fix the lrem/ldiv in macroassembler openjdk-riscv/jdk11u#575
  14. Fix the num errors in zero_words() imm openjdk-riscv/jdk11u#576

Published References

  1. HotSpot VM C2 IR入门 https://zhuanlan.zhihu.com/p/582828036

OpenJDK Upstreaming (Mostly RV64-related)

  1. Pull requests to jdk-mainline:
  • openjdk/jdk#10917 (8286301: Port JEP 425 to RISC-V)
  • openjdk/jdk#10965 (8296285: test/hotspot/jtreg/compiler/intrinsics/TestFloatIsFinite.java fails after JDK-8280378)
  • openjdk/jdk#11130 (8296916: RISC-V: Move some small macro-assembler functions to header file)
  1. Pull requests to jdk-mainline (as co-author):
  1. jdk-mainline pull requests reviewed:
  • openjdk/jdk#10921 (8296136: Use correct register in aarch64_enc_fast_unlock())
  • openjdk/jdk#10884 (8295948: Support for Zicbop/prefetch instructions on RISC-V)
  • openjdk/jdk#10878 (8295968: RISC-V: Rename some assembler intrinsic functions for RVV 1.0)
  • openjdk/jdk#10880 (8295967: RISC-V: Support negVI/negVL instructions for Vector API)
  • openjdk/jdk#10691 (8295261: RISC-V: Support ReductionV instructions for Vector API)
  • openjdk/jdk#11005 (8296435: RISC-V: Small refactoring for increment/decrement)
  • openjdk/jdk#11009 (8296447: RISC-V: Make the operands order of vrsub_vx/vrsub_vi consistent with RVV 1.0 spec)
  • openjdk/jdk#11036 (8296515: RISC-V: Small refactoring for MaxReductionV/MinReductionV/AddReductionV node implementation)
  • openjdk/jdk#11010 (8296448: RISC-V: Fix temp usages of heapbase register killed by MacroAssembler::en/decode_klass_not_null)
  • openjdk/jdk#11051 (8296301: Interpreter(RISC-V): Implement -XX:+PrintBytecodeHistogram and -XX:+PrintBytecodePairHistogram options)
  • openjdk/jdk#11074 (8296638: RISC-V: NegVI node emits wrong code when vector element basic type is T_BYTE/T_SHORT)
  • openjdk/jdk#11058 (8296602: RISC-V: improve performance of copy_memory stub)
  • openjdk/jdk#11076 (8296630: Fix SkipIfEqual on AArch64 and RISC-V)
  • openjdk/jdk#11085 (8296771: RISC-V: C2: assert(false) failed: bad AD file)
  • openjdk/jdk#11155 (8296975: RISC-V: Enable UseRVA20U64 profile by default)
  1. RISC-V port for Loom:
  1. RISC-V port for Foreign-API:

OpenJDK Upstreaming (Zhang Dingli [张定立])

OpenJDK Upstreaming (Cao Gui [曹贵])

OpenJDK8 Backporting (Zhang Xiang [章翔])

  1. Debugging work for java and javac.
  1. Debugging work for C1 and C2.
  1. Removing redundant code fragments.
  1. Published references.

Clang/LLVM for RISC-V

gollvm

Review pending.

mold

Please stay tuned.

GNU Toolchain for RISC-V

We welcome Chen Yixuan (陈逸轩) to our team. She is currently tasked to work on low-level projects.

This month, we discussed possible plans for implementing profile support, as we submitted a draft implementation for review:

https://gcc.gnu.org/pipermail/gcc-patches/2022-November/604869.html

We also aided in fixing issues in the RVV epilogue logic.

Implemented the pei-riscv64 target in Binutils.

https://sourceware.org/pipermail/binutils/2022-November/124713.html

Lin Sinan (林思南) fixed a few issues in Binutils' Zcmt support.

openhwgroup/corev-binutils-gdb#56

Fixed a few issues found in upstream regression testing.

Slide decks from the last RISC-V GNU Toolchain biweekly meeting.

AOSP for RISC-V

Arch Linux for RISC-V

Gentoo for RISC-V

8021/19585, 40.95% https://whale.plctlab.org/riscv/support-statistics/

Nixpkgs for RISC-V

Firefox (SpiderMonkey) on RV64GCV

  • Commencing upstreaming procession. Ref: https://phabricator.services.mozilla.com/D161986?id=647929
  • Patches submitted to upstream.
    • 7b126a1ecc3e Implement func (#52)
    • 78ce02b344973 Fix jump long (#51)
    • ab7ee829337b8 Implement riscv branchandlink (#50)
    • 6d2729dd14fbf Fix compareD (#49)
    • 0c86149c7827c Implement copy sign bit (#48)
    • 64d6cd88b4191 Fix wasm load/store error (#47)
    • 356638fcddeff fix wasm conversion error (#46)
    • 70e8c5de2e18c fix cmp set (#45)
    • ba48fda2d4b2e Fix NotSigned (#44)

Enable DynamoRIO running on RV64GC

Preliminary support for RV64GC is now implemented in DynamoRIO, which will now build on RV64GC (basic decoding is now supported).

Current five-stage road map for DyanmoRIO's RV64GC support:

  1. Introduce RISC-V platform-specific functions, frameworks, definitions, etc., allowing DynamoRIO to build on RISC-V. (Done)
  2. Setup RISC-V CI for automated compilation and testing. (In Progress)
  3. Refine RISC-V platform-specific functions and definitions, make DynamoRIO's built-in example tools functional. (In Progress)
  4. Refine RISC-V unit- and feature-tests, setup CI for automated testing and instruments for long-term maintenance.
  5. Continue RISC-V feature enablement for more complex programs, prepare for long-term maintenance.

See https://gist.github.com/bekcpear/7c9e710ee5b674888fcf5e5d8445dc16 for a more detailed to-do list.

OpenCV for RV64GCV

  • PR #22520 (merged): Refactoring HSV colour space conversion functions using the new Universal Intrinsic framework.
  • Issues #22878: A proposal to use the mask type in the Universal Intrinsic framework (using RVV as a reference).

Experimental/simd in LIBCXX

  • Implemented a new high-coverage testing framework via our OSPP Project.
  • Fixed a few issues found with the new testing framework: store alignment, simd_mask cast constructors, and the concat and split_by interfaces.
  • Introduced a base type for the simd class, which incorporates all operands for integer types. This base type can be used for non-uniform overload on these operands.
  • Introduced a length limit to the builtin ABI 为内部的 (tentatively using a 32-bit length limit).
  • Fixed a SFINAE check issue in the static_simd_cast and simd_cast interface.

LuaJIT RV64G porting

gem5

  • Completed implementation of the vslide instruction, leaving vcompress left to work on.
  • Developed a new RVV test set: https://github.com/ksco/riscv-vector-tests
    • Performed regression testing on gem5's RVV implementation, fixing bugs discovered in the process.

Spike

QEMU

Other Support for RISC-V International

SAIL/ACT

OpenArkCompiler Community

Shi Ninging (史宁宁) continues to work on compiling the OpenArkCompiler Weekly, which just published its 136th issue.

You may find new weekly issues of the OpenArkCompiler Weekly on Sundays on...

MLIR

Upstream RVV Dialect Proposal

Buddy Compiler

Website

buddy-mlir

https://github.com/buddy-compiler/buddy-mlir

New features:

  • [Opt] Improve CBConvVectorization Lowering pass.
  • [examples][RVVExperiment] Update options for LLC and LLI.
  • [Container] Update memref container for external use.
  • [examples] Initial deep learning model and emitc examples.

buddy-benchmark

https://github.com/buddy-compiler/buddy-benchmark

New features:

  • [DIP] Use buddy-mlir memref container.
  • [DL] Add ResNet18 benchmark.
  • Retire MemRef container of buddy-benchmark.

Chisel / FIRRTL （CAAT小队）

Please stay tuned.

coreboot for riscv

Please stay tuned.

openocd

Please stay tuned.

opensbi

  • Introduced support for debug triggers (current problem: we only have support for type 6 but not type 2 triggers, no support for chained triggers, no support for chained install), link
  • Fixed a build error in semihosting with LLVM (error: result of comparison of constant -1 with expression of type 'char' is always true), link
  • Split up sbi_ecall_replace.c so that each extension is in its individual file, link
  • Introduced support for sbi debug console, link
  • Avoid repeated reference to ae350 headers, link
  • generic/allwinner: Remove unused header files, link
  • allwinner移除奇怪的类型转换。link
  • generic/allwinner: Remove ghostly type cast, link
  • Fixed a Makefile issue for macOS, where echo -n is not supported, link
  • Makefile: bugfix for handling platform paths, link
  • sbi_domain: optimised MMIO matching, introduced in_region, optimised sbi_domain_memregion_init and is_region_subset, fixed is_region_valid, fixed an issue where the offset operation was not executed when the offset is at __riscv_xlen, link
  • Introduced various fixes for fdt, removing redundant argument checks, fixing data types, and improving error handling, link
  • Make use of .insn and .word based on compiler version to make disassembled code more readable, link
  • Introduced generic platform support for AE350, link
  • plic: Fix the off-by-one error in priority save/restore helpers, link
  • Optimised relocation (copying the program to the correct memory location), removing unneeded instructions by moving one jump, link
  • Introduced a macro for specifying boot hart (previously, opensbi uses atomic operations to randomly select boot hart), link

u-boot

Please stay tuned.

Aya Theorem Prover

  • Tagged 2 new alpha releases
  • Wrote the first tutorial: https://www.aya-prover.org/guide/haskeller-tutorial.html
    • Assumed Haskell knowledge for simplicity
  • The binary distribution now ships the standard library candidate
  • We have some very basic synthetic homotopy theory results and theorems about natural numbers!

Watch Aya Prover

Watch Aya Intellij Plugin

RISC-V Platform Evaluation

Please stay tuned.

RVLab

  1. Linux Kernel CI
  • Learned about the kselftest testing framework and deployed it in a local Ubuntu riscv64 Docker container. Recorded the procedures in published documentation (Chinese). https://zhuanlan.zhihu.com/p/579009831
  • Assembled and published documentation on LAVA deployment (running testing jobs for Qemu), https://zhuanlan.zhihu.com/p/588043928
  • Fixed an issue in lava-docker where instances fail to deploy if a physical deviced is added to boards.yaml.
  • Added a HiFive Unmatched device in LAVA, writing and deploying jobs.
    • Ran into an issue where the jobs reported missing /usr/local/bin/acme-cli for controlling power on physical devices). Temporarily worked around this issue by writing RPC server and client scripts in Python, using relays to replace the PDU as a remote power controller for the Unmatched.
    • Currently, when an automatic job is scheduled the HiFive Unmatched, it would boot but shutdown immediately after. We are currently investigating this issue.
  1. RVLab infrastructure provisioning.
  • Deployed: 6 D1 development boards (2 running openEuler, 2 running Debian, and 2 running Fedora).
  1. Others

Useful Links