From fe2ece88e852f0148e7d92693317c4a2cd8ff983 Mon Sep 17 00:00:00 2001 From: Michael Rogenmoser Date: Wed, 10 Jul 2024 16:33:15 +0200 Subject: [PATCH] Fix mismatch detection --- src/axi_bus_compare.sv | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/axi_bus_compare.sv b/src/axi_bus_compare.sv index b92e6159f..a8de54379 100644 --- a/src/axi_bus_compare.sv +++ b/src/axi_bus_compare.sv @@ -556,13 +556,13 @@ module axi_bus_compare #( //----------------------------------- for (genvar id = 0; id < 2**AxiIdWidth; id++) begin : gen_cmp assign aw_mismatch_o [id] = (fifo_cmp_valid_aw_a [id] & fifo_cmp_valid_aw_b [id]) ? - fifo_cmp_data_aw_a [id] == fifo_cmp_data_aw_b [id] : '0; + fifo_cmp_data_aw_a [id] != fifo_cmp_data_aw_b [id] : '0; assign b_mismatch_o [id] = (fifo_cmp_valid_b_a [id] & fifo_cmp_valid_b_b [id]) ? - fifo_cmp_data_b_a [id] == fifo_cmp_data_b_b [id] : '0; + fifo_cmp_data_b_a [id] != fifo_cmp_data_b_b [id] : '0; assign ar_mismatch_o [id] = (fifo_cmp_valid_ar_a [id] & fifo_cmp_valid_ar_b [id]) ? - fifo_cmp_data_ar_a [id] == fifo_cmp_data_ar_b [id] : '0; + fifo_cmp_data_ar_a [id] != fifo_cmp_data_ar_b [id] : '0; assign r_mismatch_o [id] = (fifo_cmp_valid_r_a [id] & fifo_cmp_valid_r_b [id]) ? - fifo_cmp_data_r_a [id] == fifo_cmp_data_r_b [id] : '0; + fifo_cmp_data_r_a [id] != fifo_cmp_data_r_b [id] : '0; end assign w_mismatch_o = (fifo_cmp_valid_w_a & fifo_cmp_valid_w_b ) ?