From 41271121c31af0642bb83479bee1001cdea15261 Mon Sep 17 00:00:00 2001 From: Pedro Gonnet Date: Fri, 6 Dec 2024 14:39:52 +0100 Subject: [PATCH 1/3] Set the correct L2 size for Ampere Altra (`aarch64`). --- src/arm/cache.c | 4 +++- src/arm/midr.h | 6 ++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/src/arm/cache.c b/src/arm/cache.c index dd199193..9a0343b3 100644 --- a/src/arm/cache.c +++ b/src/arm/cache.c @@ -1341,7 +1341,9 @@ void cpuinfo_arm_decode_cache( * information, please refer to the technical manuals * linked above */ - const uint32_t min_l2_size_KB = uarch == cpuinfo_uarch_neoverse_v2 ? 1024 : 256; + const uint32_t min_l2_size_KB = uarch == cpuinfo_uarch_neoverse_v2 || midr_is_ampere_altra(midr) + ? 1024 + : 256; const uint32_t min_l3_size_KB = 0; *l1i = (struct cpuinfo_cache){ diff --git a/src/arm/midr.h b/src/arm/midr.h index 89ebbb58..5530d5a9 100644 --- a/src/arm/midr.h +++ b/src/arm/midr.h @@ -34,6 +34,7 @@ #define CPUINFO_ARM_MIDR_KRYO_SILVER_820 UINT32_C(0x510F2110) #define CPUINFO_ARM_MIDR_EXYNOS_M1_M2 UINT32_C(0x530F0010) #define CPUINFO_ARM_MIDR_DENVER2 UINT32_C(0x4E0F0030) +#define CPUINFO_ARM_MIDR_AMPERE_ALTRA UINT32_C(0x413fd0c1) inline static uint32_t midr_set_implementer(uint32_t midr, uint32_t implementer) { return (midr & ~CPUINFO_ARM_MIDR_IMPLEMENTER_MASK) | @@ -167,6 +168,11 @@ inline static bool midr_is_kryo_gold(uint32_t midr) { return (midr & uarch_mask) == (CPUINFO_ARM_MIDR_KRYO_GOLD & uarch_mask); } +inline static bool midr_is_ampere_altra(uint32_t midr) { + const uint32_t uarch_mask = CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK; + return (midr & uarch_mask) == (CPUINFO_ARM_MIDR_AMPERE_ALTRA & uarch_mask); +} + inline static uint32_t midr_score_core(uint32_t midr) { const uint32_t core_mask = CPUINFO_ARM_MIDR_IMPLEMENTER_MASK | CPUINFO_ARM_MIDR_PART_MASK; switch (midr & core_mask) { From 5279c5f584168fac841155331d74b62189d5fd2e Mon Sep 17 00:00:00 2001 From: Pedro Gonnet Date: Fri, 6 Dec 2024 15:47:59 +0100 Subject: [PATCH 2/3] Fix formatting --- src/arm/cache.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/arm/cache.c b/src/arm/cache.c index 9a0343b3..6551d256 100644 --- a/src/arm/cache.c +++ b/src/arm/cache.c @@ -1341,7 +1341,8 @@ void cpuinfo_arm_decode_cache( * information, please refer to the technical manuals * linked above */ - const uint32_t min_l2_size_KB = uarch == cpuinfo_uarch_neoverse_v2 || midr_is_ampere_altra(midr) + const uint32_t min_l2_size_KB = + uarch == cpuinfo_uarch_neoverse_v2 || midr_is_ampere_altra(midr) ? 1024 : 256; const uint32_t min_l3_size_KB = 0; From 45a761d6c4c52e2a5276985c89ee7a2ab15d7006 Mon Sep 17 00:00:00 2001 From: Pedro Gonnet Date: Fri, 6 Dec 2024 16:20:17 +0100 Subject: [PATCH 3/3] Fix formatting. --- src/arm/cache.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/src/arm/cache.c b/src/arm/cache.c index 6551d256..97740c43 100644 --- a/src/arm/cache.c +++ b/src/arm/cache.c @@ -1342,9 +1342,7 @@ void cpuinfo_arm_decode_cache( * linked above */ const uint32_t min_l2_size_KB = - uarch == cpuinfo_uarch_neoverse_v2 || midr_is_ampere_altra(midr) - ? 1024 - : 256; + (uarch == cpuinfo_uarch_neoverse_v2 || midr_is_ampere_altra(midr)) ? 1024 : 256; const uint32_t min_l3_size_KB = 0; *l1i = (struct cpuinfo_cache){