From 6ec13a7779e0491aab3dc32c8d73c43aed1f2be6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Tue, 12 Sep 2023 15:39:57 +0200 Subject: [PATCH] chibios: mark boot2 bootlader data readonly It does not need to be writable, also if the .boot2 section is writable it forces some other sections to be writable, too. Fixes the following warning with GNU ld 2.41: /usr/lib/gcc/arm-none-eabi/13.2.0/../../../../arm-none-eabi/bin/ld: warning: .build/1upkeyboards_sweet16v2_kb2040_default.elf has a LOAD segment with RWX permissions ELF layout before: Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x10000000 0x10000000 0x0a858 0x0a858 RWE 0x1000 LOAD 0x00c000 0x20000000 0x1000a858 0x0081c 0x0081c R E 0x1000 LOAD 0x000820 0x20000820 0x1000b074 0x00000 0x0189c RW 0x1000 LOAD 0x000c00 0x20040c00 0x1000b074 0x00000 0x00120 RW 0x1000 LOAD 0x0000bc 0x200020bc 0x200020bc 0x00000 0x3df44 RW 0x1000 LOAD 0x000000 0x20040000 0x20040000 0x00000 0x00c00 RW 0x1000 LOAD 0x000000 0x20041000 0x20041000 0x00000 0x00c00 RW 0x1000 Section to Segment mapping: Segment Sections... 00 .boot2 .vectors .text .rodata 01 .data 02 .bss 03 .ram4 04 .heap 05 .mstack .pstack 06 .c1_mstack .c1_pstack ELF layout after: Program Headers: Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align LOAD 0x001000 0x10000000 0x10000000 0x0a858 0x0a858 R E 0x1000 LOAD 0x00c000 0x20000000 0x1000a858 0x0081c 0x0081c R E 0x1000 LOAD 0x000820 0x20000820 0x1000b074 0x00000 0x0189c RW 0x1000 LOAD 0x000c00 0x20040c00 0x1000b074 0x00000 0x00120 RW 0x1000 LOAD 0x0000bc 0x200020bc 0x200020bc 0x00000 0x3df44 RW 0x1000 LOAD 0x000000 0x20040000 0x20040000 0x00000 0x00c00 RW 0x1000 LOAD 0x000000 0x20041000 0x20041000 0x00000 0x00c00 RW 0x1000 Section to Segment mapping: Segment Sections... 00 .boot2 .vectors .text .rodata 01 .data 02 .bss 03 .ram4 04 .heap 05 .mstack .pstack 06 .c1_mstack .c1_pstack --- .../wear_leveling/wear_leveling_rp2040_flash.c | 4 ++-- platforms/chibios/vendors/RP/stage2_bootloaders.c | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/platforms/chibios/drivers/wear_leveling/wear_leveling_rp2040_flash.c b/platforms/chibios/drivers/wear_leveling/wear_leveling_rp2040_flash.c index 640628e1e9ab..6624c30b5b3f 100644 --- a/platforms/chibios/drivers/wear_leveling/wear_leveling_rp2040_flash.c +++ b/platforms/chibios/drivers/wear_leveling/wear_leveling_rp2040_flash.c @@ -25,8 +25,8 @@ #define FLASHCMD_READ_STATUS 0x05 #define FLASHCMD_WRITE_ENABLE 0x06 -extern uint8_t BOOT2_ROM[256]; -static uint32_t BOOT2_ROM_RAM[64]; +extern const uint8_t BOOT2_ROM[256]; +static uint32_t BOOT2_ROM_RAM[64]; static ssi_hw_t *const ssi = (ssi_hw_t *)XIP_SSI_BASE; diff --git a/platforms/chibios/vendors/RP/stage2_bootloaders.c b/platforms/chibios/vendors/RP/stage2_bootloaders.c index e65b0a5802cf..131fa0ce9ef3 100644 --- a/platforms/chibios/vendors/RP/stage2_bootloaders.c +++ b/platforms/chibios/vendors/RP/stage2_bootloaders.c @@ -13,7 +13,7 @@ #if defined(RP2040_FLASH_AT25SF128A) -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x31, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21, 0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2d, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22, @@ -40,7 +40,7 @@ uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { #elif defined(RP2040_FLASH_GD25Q64CS) -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x31, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21, 0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2d, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22, @@ -67,7 +67,7 @@ uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { #elif defined(RP2040_FLASH_W25X10CL) -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x14, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x12, 0x49, 0x19, 0x60, 0x00, 0x21, 0x59, 0x60, 0x11, 0x49, 0x12, 0x48, 0x01, 0x60, 0x01, 0x21, 0x99, 0x60, 0xbb, 0x21, 0x19, 0x66, 0x02, 0x21, @@ -94,7 +94,7 @@ uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { #elif defined(RP2040_FLASH_IS25LP080) -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x2b, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x29, 0x49, 0x19, 0x60, 0x01, 0x21, 0x99, 0x60, 0x28, 0x48, 0x00, 0xf0, 0x42, 0xf8, 0x28, 0x4a, 0x90, 0x42, 0x12, 0xd0, 0x06, 0x21, 0x19, 0x66, @@ -121,7 +121,7 @@ uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { #elif defined(RP2040_FLASH_GENERIC_03H) -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x0c, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x0a, 0x49, 0x19, 0x60, 0x0a, 0x49, 0x0b, 0x48, 0x01, 0x60, 0x00, 0x21, 0x59, 0x60, 0x01, 0x21, 0x99, 0x60, 0x01, 0xbc, 0x00, 0x28, 0x00, 0xd0, @@ -148,7 +148,7 @@ uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { #else -uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { +const uint8_t BOOTLOADER_SECTION BOOT2_ROM[256] = { 0x00, 0xb5, 0x32, 0x4b, 0x21, 0x20, 0x58, 0x60, 0x98, 0x68, 0x02, 0x21, 0x88, 0x43, 0x98, 0x60, 0xd8, 0x60, 0x18, 0x61, 0x58, 0x61, 0x2e, 0x4b, 0x00, 0x21, 0x99, 0x60, 0x04, 0x21, 0x59, 0x61, 0x01, 0x21, 0xf0, 0x22,