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Alignment trap seems unable to handle ARM VLDR instruction #3099
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ARMv7-A architecture ref manual says VLDR must be word aligned or you'll cause an alignment fault (A3.2.1) |
You're right, I missed that. My question remains though: |
If you want to contribute VLDR alignment fixups to the Linux kernel then go ahead, but we aren't going to be spending our time on it. |
I case anyone stumbles on this... |
Describe the bug
I run into SIGBUS crashes due to unaligned memory access via the VLDR instruction in one of my applications running on a raspberry pi. The application in question uses zero-copy networking, which leads to unaligned memory. Specifically, I have a few float values which are not 4 byte aligned. The kernel seems to be fine with using the LDR instruction on unaligned memory, however when the compiler decides to rely on the VLDR instruction, SIGBUS is thrown.
To reproduce
I managed to generate a small code example which exactly reproduces what I am seeing. See the code below and compile without optimization. In the additional context you see the generated assembly code for
foo::x()
andfoo::x_id()
on my machine. In the first case, the compiler relies onLDR
andVMOV
, whereas the second function usesVLDR
and causes a SIGBUS error. See the excerpt from the journal.Expected behaviour
I'm not entirely sure whether this is a kernel bug and the kernel should be able to handle this unaligned memory access.
Based on the ARM manual theThe comments in the respective kernel code do not talk about theVLDR
instruction should be able to handle an unaligned memory address, so the alignment trap shouldn't even trigger?VLDR
instruction.Actual behaviour
The process crashes with SIGBUS.
System
Copy and paste the results of the raspinfo command in to this section. Alternatively, copy and paste a pastebin link, or add answers to the following questions:
Pi3B
cat /etc/rpi-issue
)?vcgencmd version
)?uname -a
)?Logs
Additional context
Alignment trap is setup to
warn+fixup
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