diff --git a/src/rp2040/hardware_structs/include/hardware/structs/i2c.h b/src/rp2040/hardware_structs/include/hardware/structs/i2c.h
index 4bc501f28..f8b4a6647 100644
--- a/src/rp2040/hardware_structs/include/hardware/structs/i2c.h
+++ b/src/rp2040/hardware_structs/include/hardware/structs/i2c.h
@@ -62,80 +62,73 @@ typedef struct {
 // references to these in I2C register header; these are *fixed* values,
 // set at hardware design time):
 
-// SLAVE_INTERFACE_TYPE .............. 0
-// REG_TIMEOUT_WIDTH ................. 4
-// REG_TIMEOUT_VALUE ................. 8
 // IC_ULTRA_FAST_MODE ................ 0x0
 // IC_UFM_TBUF_CNT_DEFAULT ........... 0x8
+// IC_UFM_SCL_LOW_COUNT .............. 0x0008
 // IC_UFM_SCL_HIGH_COUNT ............. 0x0006
 // IC_TX_TL .......................... 0x0
-// IC_STOP_DET_IF_MASTER_ACTIVE ...... 0x0
-// IC_SS_SCL_LOW_COUNT ............... 0x01d6
-// IC_HAS_DMA ........................ 0x1
-// IC_RX_FULL_GEN_NACK ............... 0x0
-// IC_CLOCK_PERIOD ................... 100
-// IC_EMPTYFIFO_HOLD_MASTER_EN ....... 1
+// IC_TX_CMD_BLOCK ................... 0x1
+// IC_HAS_DMA ........................ 0x0
+// IC_HAS_ASYNC_FIFO ................. 0x0
 // IC_SMBUS_ARP ...................... 0x0
 // IC_FIRST_DATA_BYTE_STATUS ......... 0x1
 // IC_INTR_IO ........................ 0x1
 // IC_MASTER_MODE .................... 0x1
-// IC_DEFAULT_ACK_GENERAL_CALL ....... 0x0
+// IC_DEFAULT_ACK_GENERAL_CALL ....... 0x1
 // IC_INTR_POL ....................... 0x1
 // IC_OPTIONAL_SAR ................... 0x0
 // IC_DEFAULT_TAR_SLAVE_ADDR ......... 0x055
 // IC_DEFAULT_SLAVE_ADDR ............. 0x055
 // IC_DEFAULT_HS_SPKLEN .............. 0x1
-// IC_FS_SCL_HIGH_COUNT .............. 0x003c
-// IC_HS_SCL_LOW_COUNT ............... 0x0010
+// IC_FS_SCL_HIGH_COUNT .............. 0x0006
+// IC_HS_SCL_LOW_COUNT ............... 0x0008
 // IC_DEVICE_ID_VALUE ................ 0x0
 // IC_10BITADDR_MASTER ............... 0x0
 // IC_CLK_FREQ_OPTIMIZATION .......... 0x0
-// IC_DEFAULT_FS_SPKLEN .............. 0xf
-// IC_ADD_ENCODED_PARAMS ............. 0x1
+// IC_DEFAULT_FS_SPKLEN .............. 0x7
+// IC_ADD_ENCODED_PARAMS ............. 0x0
 // IC_DEFAULT_SDA_HOLD ............... 0x000001
 // IC_DEFAULT_SDA_SETUP .............. 0x64
 // IC_AVOID_RX_FIFO_FLUSH_ON_TX_ABRT . 0x0
-// SLVERR_RESP_EN .................... 0
+// IC_CLOCK_PERIOD ................... 100
+// IC_EMPTYFIFO_HOLD_MASTER_EN ....... 1
 // IC_RESTART_EN ..................... 0x1
-// IC_TX_CMD_BLOCK ................... 0x1
-// HC_REG_TIMEOUT_VALUE .............. 0
-// IC_BUS_CLEAR_FEATURE .............. 0x1
+// IC_TX_CMD_BLOCK_DEFAULT ........... 0x0
+// IC_BUS_CLEAR_FEATURE .............. 0x0
 // IC_CAP_LOADING .................... 100
-// IC_HAS_ASYNC_FIFO ................. 0x0
-// IC_FS_SCL_LOW_COUNT ............... 0x0082
+// IC_FS_SCL_LOW_COUNT ............... 0x000d
 // APB_DATA_WIDTH .................... 32
 // IC_SDA_STUCK_TIMEOUT_DEFAULT ...... 0xffffffff
 // IC_SLV_DATA_NACK_ONLY ............. 0x1
 // IC_10BITADDR_SLAVE ................ 0x0
-// IC_TX_BUFFER_DEPTH ................ 32
-// IC_DEFAULT_UFM_SPKLEN ............. 0x1
 // IC_CLK_TYPE ....................... 0x0
-// IC_TX_CMD_BLOCK_DEFAULT ........... 0x0
 // IC_SMBUS_UDID_MSB ................. 0x0
 // IC_SMBUS_SUSPEND_ALERT ............ 0x0
 // IC_HS_SCL_HIGH_COUNT .............. 0x0006
 // IC_SLV_RESTART_DET_EN ............. 0x1
-// IC_SMBUS .......................... 0x1
-// IC_STAT_FOR_CLK_STRETCH ........... 0x1
-// IC_MAX_SPEED_MODE ................. 0x2
+// IC_SMBUS .......................... 0x0
 // IC_OPTIONAL_SAR_DEFAULT ........... 0x0
 // IC_PERSISTANT_SLV_ADDR_DEFAULT .... 0x0
-// IC_USE_COUNTS ..................... 0x1
-// IC_RX_BUFFER_DEPTH ................ 32
+// IC_USE_COUNTS ..................... 0x0
+// IC_RX_BUFFER_DEPTH ................ 16
 // IC_SCL_STUCK_TIMEOUT_DEFAULT ...... 0xffffffff
 // IC_RX_FULL_HLD_BUS_EN ............. 0x1
 // IC_SLAVE_DISABLE .................. 0x1
 // IC_RX_TL .......................... 0x0
 // IC_DEVICE_ID ...................... 0x0
 // IC_HC_COUNT_VALUES ................ 0x0
-// I2C_DYNAMIC_TAR_UPDATE ............ 1
+// I2C_DYNAMIC_TAR_UPDATE ............ 0
 // IC_SMBUS_CLK_LOW_MEXT_DEFAULT ..... 0xffffffff
 // IC_SMBUS_CLK_LOW_SEXT_DEFAULT ..... 0xffffffff
 // IC_HS_MASTER_CODE ................. 0x1
 // IC_SMBUS_RST_IDLE_CNT_DEFAULT ..... 0xffff
-// IC_UFM_SCL_LOW_COUNT .............. 0x0008
-// IC_SMBUS_UDID_HC .................. 0x1
 // IC_SMBUS_UDID_LSB_DEFAULT ......... 0xffffffff
-// IC_SS_SCL_HIGH_COUNT .............. 0x0190
+// IC_SS_SCL_HIGH_COUNT .............. 0x0028
+// IC_SS_SCL_LOW_COUNT ............... 0x002f
+// IC_MAX_SPEED_MODE ................. 0x2
+// IC_STAT_FOR_CLK_STRETCH ........... 0x0
+// IC_STOP_DET_IF_MASTER_ACTIVE ...... 0x0
+// IC_DEFAULT_UFM_SPKLEN ............. 0x1
+// IC_TX_BUFFER_DEPTH ................ 16
 
 #endif