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BUG IN ORIGINAL arlet 6502.v: D flag js not properly initialised on r… gds #46: Commit b1ea595 pushed by rejunity
October 25, 2024 20:13 37m 16s main
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October 25, 2024 20:13 37m 16s
BUG IN ORIGINAL arlet 6502.v: D flag js not properly initialised on r… gds #45: Commit 37eed14 pushed by rejunity
October 25, 2024 19:59 39m 6s main
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October 25, 2024 19:59 39m 6s
test 3 frames gds #44: Commit 27ac7f1 pushed by rejunity
October 24, 2024 21:41 41m 1s main
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October 24, 2024 21:41 41m 1s
Track only top gds #43: Commit 6096483 pushed by rejunity
October 24, 2024 21:40 38m 1s main
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October 24, 2024 21:40 38m 1s
test 1++ frame gds #42: Commit 5a6a23d pushed by rejunity
October 24, 2024 21:14 37m 42s main
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October 24, 2024 21:14 37m 42s
Also track PC reg gds #41: Commit 9582f1f pushed by rejunity
October 24, 2024 21:09 39m 0s main
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October 24, 2024 21:09 39m 0s
test 800*64*2 cycles (but reduce number of tracked signals) gds #40: Commit 6361753 pushed by rejunity
October 24, 2024 21:07 38m 29s main
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October 24, 2024 21:07 38m 29s
test 800*56 cycles (until the first WSYNC) gds #39: Commit fc4e173 pushed by rejunity
October 24, 2024 20:28 39m 1s main
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October 24, 2024 20:28 39m 1s
test 400 cycles gds #38: Commit e14c248 pushed by rejunity
October 24, 2024 19:48 39m 31s main
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October 24, 2024 19:48 39m 31s
test 800*64*2 cycles gds #37: Commit f7c2e85 pushed by rejunity
October 24, 2024 15:52 40m 33s main
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October 24, 2024 15:52 40m 33s
Proper reset for audio counters & output flip-flop. gds #36: Commit 1740599 pushed by rejunity
October 24, 2024 15:52 40m 22s main
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October 24, 2024 15:52 40m 22s
Temporarily disabled dithering and audio to see why GDS fails. gds #35: Commit 5d2935e pushed by rejunity
October 24, 2024 12:01 35m 36s main
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October 24, 2024 12:01 35m 36s
BUG IN ORIGINAL arlet 6502.v: WE has held HIGH during RESET sequence … gds #34: Commit 162c005 pushed by rejunity
October 24, 2024 10:00 22m 7s main
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October 24, 2024 10:00 22m 7s
audio_l and audio_r are being driven constantly. gds #33: Commit f8aba68 pushed by rejunity
October 24, 2024 09:34 27m 19s main
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October 24, 2024 09:34 27m 19s
Small readability improvement gds #32: Commit 68e1194 pushed by rejunity
October 23, 2024 23:30 43m 25s main
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October 23, 2024 23:30 43m 25s
Clear address_bus_r register on reset gds #31: Commit 8e2a700 pushed by rejunity
October 23, 2024 23:30 43m 11s main
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October 23, 2024 23:30 43m 11s
Various PWM methods for dithering 128 colors via 6 bpp. gds #30: Commit 3ef2c3e pushed by rejunity
October 22, 2024 10:40 50m 32s main
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October 22, 2024 10:40 50m 32s
PWM audio output gds #29: Commit 46adc53 pushed by rejunity
October 14, 2024 22:11 44m 48s main
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October 14, 2024 22:11 44m 48s
Scanline RAM design suggested by Ravenslofty gds #28: Commit c2f5836 pushed by rejunity
October 13, 2024 20:10 6h 0m 25s main
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October 13, 2024 20:10 6h 0m 25s
Split scanline into a pair of 128 + 32 element RAMs to see if it is b… gds #27: Commit 95dd717 pushed by rejunity
October 13, 2024 19:30 46m 39s main
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October 13, 2024 19:30 46m 39s
Make scanline 255 elements to make synthesis happy. gds #26: Commit d482af1 pushed by rejunity
October 13, 2024 19:21 43m 15s main
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October 13, 2024 19:21 43m 15s
Scanline 160 pixels by 7 bit gds #25: Commit 607c4c7 pushed by rejunity
October 11, 2024 11:26 2m 47s main
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October 11, 2024 11:26 2m 47s
OL2: shorter GL_TEST gds #24: Commit eafddbd pushed by rejunity
October 11, 2024 11:22 46m 26s main
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October 11, 2024 11:22 46m 26s
OL1: pong gds #23: Commit e8c3565 pushed by rejunity
October 10, 2024 20:05 25m 9s main
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October 10, 2024 20:05 25m 9s
OL2: pong gds #22: Commit 826a3b6 pushed by rejunity
October 10, 2024 20:03 1h 11m 29s main
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October 10, 2024 20:03 1h 11m 29s