Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Problem in compilation #15

Open
panda1628 opened this issue May 19, 2021 · 1 comment
Open

Problem in compilation #15

panda1628 opened this issue May 19, 2021 · 1 comment

Comments

@panda1628
Copy link

make[1]: Entering directory /fac/proj/xxx/imperas-riscv-tests/imperas-riscv-tests' make -j8 --max-load=4 \ RISCV_TARGET=riscvOVPsim \ RISCV_DEVICE=rv32i \ RISCV_PREFIX=/project/usr-xxx-RHEL6/risc-v/tools/riscv64-unknown-elf/bin/riscv64-unknown-elf- \ RISCV_ISA=rv32i \ run -C /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/riscv-test-suite/rv32i make[2]: Entering directory /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/riscv-test-suite/rv32i'
make[2]: warning: -jN forced in submake: disabling jobserver mode.
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-ADDI-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-ORI-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-ANDI-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-LUI-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-AUIPC-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-JAL-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-JALR-01.elf
Compile /fac/proj_xxx/xxx/imperas-riscv-tests/imperas-riscv-tests/work/rv32i/I-BEQ-01.elf
src/I-BEQ-01.S: Assembler messages:
src/I-BEQ-01.S:48: Error: value of 1224202764749001109 too large for field of 4 bytes at 340

li x31, 0x10fd3dedadea5195 <--- Line 48

It is a 64 bits value.
The target is rv32i

Do I miss anything?

@duncangraham-Imperas
Copy link
Contributor

Is this resolved?
What RISC-V toolchain is being used?

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

2 participants