vmulh* and ZVE64* question

[aprnath]

Does Spike support this statement from the spec:

All Zve* extensions support all vector integer instructions (Section Section 31.11), except that the vmulh integer multiply variants that return the high word of the product (vmulh.vv, vmulh.vx, vmulhu.vv, vmulhu.vx, vmulhsu.vv, vmulhsu.vx) are not included for EEW=64 in Zve64*.

When using zvl128b_zve64f, Spike does not seem to tale an illegal_instruction exception for vmulh.vv. Is there something specific that is needed to enable this behavior?

[aswaterman]

This is not technically a violation of the ISA, as the reserved behavior of unimplemented opcodes does not mandate an illegal-instruction exception. Nevertheless, it is an error of intent. I agree that Spike should be changed to raise an illegal-instruction exception for these instructions for SEW=64 when the full V extension is not provided. If you want to make a PR that does so, go for it.