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[stm32] Fix Uart7 and Uart8
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chris-durand authored and salkinium committed Jan 28, 2018
1 parent 4656fd4 commit 95233ba
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Showing 3 changed files with 4 additions and 4 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -119,7 +119,7 @@ xpcc::stm32::Buffered{{ className }}{{ id }}::setBaudrate(uint32_t baudrate,
RCC->APB2ENR |= RCC_APB2ENR_USART{{ id }}EN;
{%- elif id in [2, 3] -%}
RCC->APB1ENR |= RCC_APB1ENR_USART{{ id }}EN;
{%- elif id in [4, 5] -%}
{%- elif id in [4, 5, 7, 8] -%}
RCC->APB1ENR |= RCC_APB1ENR_UART{{ id }}EN;
{%- endif %}

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Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ xpcc::stm32::BufferedFlow{{ className }}{{ id }}::setBaudrate(uint32_t baudrate,
RCC->APB2ENR |= RCC_APB2ENR_USART{{ id }}EN;
{%- elif id in [2, 3] -%}
RCC->APB1ENR |= RCC_APB1ENR_USART{{ id }}EN;
{%- elif id in [4, 5] -%}
{%- elif id in [4, 5, 7, 8] -%}
RCC->APB1ENR |= RCC_APB1ENR_UART{{ id }}EN;
{%- endif %}

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Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ xpcc::stm32::{{ name }}::enable()
// reset timer
RCC->APB2RSTR |= RCC_APB2RSTR_{{ peripheral }}RST;
RCC->APB2RSTR &= ~RCC_APB2RSTR_{{ peripheral }}RST;
%% elif id in [2, 3, 4, 5]
%% elif id in [2, 3, 4, 5, 7, 8]
// FIXME: there seems to be a bug in the stm32f3xxlib which does not provide
// the necessary RCC_APB1ENR_UART5EN define and probably defines
// RCC_APB1ENR_UART4EN incorrectly (0x00100000 instead of 0x00080000)
Expand All @@ -75,7 +75,7 @@ xpcc::stm32::{{ name }}::disable()
%% if id in [1, 6]
// disable clock
RCC->APB2ENR &= ~RCC_APB2ENR_{{ peripheral }}EN;
%% elif id in [2, 3, 4, 5]
%% elif id in [2, 3, 4, 5, 7, 8]
// FIXME: there seems to be a bug in the stm32f3xxlib which does not provide
// the necessary RCC_APB1ENR_UART5EN define and probably defines
// RCC_APB1ENR_UART4EN incorrectly (0x00100000 instead of 0x00080000)
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