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perfmon_haswellEP_events.txt
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perfmon_haswellEP_events.txt
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# =======================================================================================
#
# Filename: perfmon_haswellEP_events.txt
#
# Description: Event list for Intel Haswell EP/EN/EX
#
# Version: <VERSION>
# Released: <DATE>
#
# Author: Jan Treibig (jt), jan.treibig@gmail.com
# Thomas Gruber (tr), thomas.roehl@googlemail.com
# Project: likwid
#
# Copyright (C) 2015 RRZE, University Erlangen-Nuremberg
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT ANY
# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
# =======================================================================================
EVENT_TEMP_CORE 0x00 TMP0
UMASK_TEMP_CORE 0x00
EVENT_PWR_PKG_ENERGY 0x02 PWR0
UMASK_PWR_PKG_ENERGY 0x00
EVENT_PWR_PP0_ENERGY 0x01 PWR1
UMASK_PWR_PP0_ENERGY 0x00
EVENT_PWR_PP1_ENERGY 0x04 PWR2
UMASK_PWR_PP1_ENERGY 0x00
EVENT_PWR_DRAM_ENERGY 0x03 PWR3
UMASK_PWR_DRAM_ENERGY 0x00
EVENT_VOLTAGE_CORE 0x00 VTG0
UMASK_VOLTAGE_CORE 0x00
EVENT_INSTR_RETIRED 0x00 FIXC0
UMASK_INSTR_RETIRED_ANY 0x00
EVENT_CPU_CLK_UNHALTED 0x00 FIXC1
UMASK_CPU_CLK_UNHALTED_CORE 0x00
DEFAULT_OPTIONS_CPU_CLK_UNHALTED_ANY EVENT_OPTION_ANYTHREAD=1
UMASK_CPU_CLK_UNHALTED_ANY 0x00
EVENT_CPU_CLK_UNHALTED 0x00 FIXC2
UMASK_CPU_CLK_UNHALTED_REF 0x00
EVENT_LD_BLOCKS 0x03 PMC
UMASK_LD_BLOCKS_STORE_FORWARD 0x02
UMASK_LD_BLOCKS_NO_SR 0x08
EVENT_MISALIGN_MEM_REF 0x05 PMC
UMASK_MISALIGN_MEM_REF_LOADS 0x01
UMASK_MISALIGN_MEM_REF_STORES 0x02
UMASK_MISALIGN_MEM_REF_ANY 0x03
EVENT_LD_BLOCKS_PARTIAL 0x07 PMC
UMASK_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS 0x01
EVENT_DTLB_LOAD_MISSES 0x08 PMC
UMASK_DTLB_LOAD_MISSES_CAUSES_A_WALK 0x01
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_4K 0x02
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED_LARGE 0x04
UMASK_DTLB_LOAD_MISSES_WALK_COMPLETED 0x0E
UMASK_DTLB_LOAD_MISSES_WALK_DURATION 0x10
UMASK_DTLB_LOAD_MISSES_STLB_HIT_4K 0x20
UMASK_DTLB_LOAD_MISSES_STLB_HIT_2M 0x40
UMASK_DTLB_LOAD_MISSES_STLB_HIT 0x60
UMASK_DTLB_LOAD_MISSES_PDE_CACHE_MISS 0x80
EVENT_INT_MISC 0x0D PMC
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_INT_MISC_RECOVERY_CYCLES 0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=0x1
UMASK_INT_MISC_RECOVERY_COUNT 0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_CYCLES_ANY EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_INT_MISC_RECOVERY_CYCLES_ANY 0x03
DEFAULT_OPTIONS_INT_MISC_RECOVERY_COUNT_ANY EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1,EVENT_OPTION_EDGE=0x1
UMASK_INT_MISC_RECOVERY_COUNT_ANY 0x03
EVENT_UOPS_ISSUED 0x0E PMC
UMASK_UOPS_ISSUED_ANY 0x01
UMASK_UOPS_ISSUED_FLAGS_MERGE 0x10
UMASK_UOPS_ISSUED_SLOW_LEA 0x20
UMASK_UOPS_ISSUED_SINGLE_MUL 0x40
DEFAULT_OPTIONS_UOPS_ISSUED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_ISSUED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_ISSUED_CORE_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_ISSUED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_ISSUED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_ISSUED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_ISSUED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_ISSUED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_ISSUED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_ISSUED_CYCLES_GE_6_UOPS_EXEC 0x01
EVENT_ARITH_DIVIDER 0x14 PMC
UMASK_ARITH_DIVIDER_CYCLES 0x01
UMASK_ARITH_DIVIDER_UOPS 0x02
EVENT_L2_RQSTS 0x24 PMC
UMASK_L2_RQSTS_ALL_DEMAND_DATA_RD_MISS 0x21
UMASK_L2_RQSTS_ALL_DEMAND_DATA_RD_HIT 0x41
UMASK_L2_RQSTS_ALL_DEMAND_DATA_RD 0xE1
UMASK_L2_RQSTS_RFO_HIT 0x42
UMASK_L2_RQSTS_RFO_MISS 0x22
UMASK_L2_RQSTS_ALL_RFO 0xE2
UMASK_L2_RQSTS_CODE_RD_HIT 0x44
UMASK_L2_RQSTS_CODE_RD_MISS 0x24
UMASK_L2_RQSTS_ALL_DEMAND_MISS 0x27
UMASK_L2_RQSTS_ALL_DEMAND_REFERENCES 0xE7
UMASK_L2_RQSTS_ALL_CODE_RD 0xE4
UMASK_L2_RQSTS_L2_PF_HIT 0x50
UMASK_L2_RQSTS_L2_PF_MISS 0x30
UMASK_L2_RQSTS_ALL_PF 0xF8
UMASK_L2_RQSTS_MISS 0x3F
UMASK_L2_RQSTS_REFERENCES 0xFF
EVENT_L2_DEMAND_RQST_WB_HIT 0x27 PMC
UMASK_L2_DEMAND_RQST_WB_HIT 0x50
EVENT_LONGEST_LAT_CACHE 0x2E PMC
UMASK_LONGEST_LAT_CACHE_REFERENCE 0x4F
UMASK_LONGEST_LAT_CACHE_MISS 0x41
EVENT_CPU_CLOCK_UNHALTED 0x3C PMC
UMASK_CPU_CLOCK_UNHALTED_THREAD_P 0x00
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_THREAD_P_ANY EVENT_OPTION_ANYTHREAD=1
UMASK_CPU_CLOCK_UNHALTED_THREAD_P_ANY 0x00
UMASK_CPU_CLOCK_UNHALTED_REF_XCLK 0x01
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_REF_XCLK_ANY EVENT_OPTION_ANYTHREAD=1
UMASK_CPU_CLOCK_UNHALTED_REF_XCLK_ANY 0x01
UMASK_CPU_CLOCK_UNHALTED_ONE_THREAD_ACTIVE 0x02
DEFAULT_OPTIONS_CPU_CLOCK_UNHALTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0x2,EVENT_OPTION_INVERT=0x1
UMASK_CPU_CLOCK_UNHALTED_TOTAL_CYCLES 0x00
EVENT_L1D_PEND_MISS 0x48 PMC2
UMASK_L1D_PEND_MISS_PENDING 0x01
DEFAULT_OPTIONS_L1D_PEND_MISS_PENDING_CYCLES_ANY EVENT_OPTION_ANYTHREAD=1,EVENT_OPTION_THRESHOLD=0x1
UMASK_L1D_PEND_MISS_PENDING_CYCLES_ANY 0x01
DEFAULT_OPTIONS_L1D_PEND_MISS_PENDING_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_L1D_PEND_MISS_PENDING_CYCLES 0x01
EVENT_L1D_PEND_MISS_FB_FULL 0x48 PMC
UMASK_L1D_PEND_MISS_FB_FULL_REQUEST 0x02
DEFAULT_OPTIONS_L1D_PEND_MISS_FB_FULL EVENT_OPTION_THRESHOLD=0x1
UMASK_L1D_PEND_MISS_FB_FULL 0x02
EVENT_DTLB_STORE_MISSES 0x49 PMC
UMASK_DTLB_STORE_MISSES_CAUSES_A_WALK 0x01
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_4K 0x02
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED_LARGE 0x04
UMASK_DTLB_STORE_MISSES_WALK_COMPLETED 0x0E
UMASK_DTLB_STORE_MISSES_WALK_DURATION 0x10
UMASK_DTLB_STORE_MISSES_STLB_HIT_4K 0x20
UMASK_DTLB_STORE_MISSES_STLB_HIT_2M 0x40
UMASK_DTLB_STORE_MISSES_STLB_HIT 0x60
UMASK_DTLB_STORE_MISSES_PDE_CACHE_MISS 0x80
EVENT_LOAD_HIT_PRE 0x4C PMC
UMASK_LOAD_HIT_PRE_SW_PF 0x01
UMASK_LOAD_HIT_PRE_HW_PF 0x02
EVENT_EPT_WALK_CYCLES 0x4F PMC
UMASK_EPT_WALK_CYCLES 0x10
EVENT_L1D 0x51 PMC
UMASK_L1D_REPLACEMENT 0x01
UMASK_L1D_ALLOCATED_IN_M 0x02
UMASK_L1D_M_EVICT 0x04
UMASK_L1D_ALL_M_REPLACEMENT 0x08
EVENT_TX_MEM 0x54 PMC
UMASK_TX_MEM_ABORT_CONFLICT 0x01
UMASK_TX_MEM_ABORT_CAPACITY_WRITE 0x02
UMASK_TX_MEM_ABORT_HLE_STORE_TO_ELIDED_LOCK 0x04
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_NOT_EMPTY 0x08
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_MISMATCH 0x10
UMASK_TX_MEM_ABORT_HLE_ELISION_BUFFER_UNSUPPORTED_ALIGNMENT 0x20
UMASK_TX_MEM_HLE_ELISION_BUFFER_FULL 0x40
EVENT_MOVE_ELIMINATION 0x58 PMC
UMASK_MOVE_ELIMINATION_INT_NOT_ELIMINATED 0x04
UMASK_MOVE_ELIMINATION_SIMD_NOT_ELIMINATED 0x08
UMASK_MOVE_ELIMINATION_INT_ELIMINATED 0x01
UMASK_MOVE_ELIMINATION_SIMD_ELIMINATED 0x02
EVENT_CPL_CYCLES 0x5C PMC
UMASK_CPL_CYCLES_RING0 0x01
UMASK_CPL_CYCLES_RING123 0x02
DEFAULT_OPTIONS_CPL_CYCLES_RING0_TRANS EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_CPL_CYCLES_RING0_TRANS 0x01
EVENT_TX_EXEC 0x5D PMC
UMASK_TX_EXEC_MISC1 0x01
UMASK_TX_EXEC_MISC2 0x02
UMASK_TX_EXEC_MISC3 0x04
UMASK_TX_EXEC_MISC4 0x08
UMASK_TX_EXEC_MISC5 0x10
EVENT_RS_EVENTS 0x5E PMC
UMASK_RS_EVENTS_EMPTY_CYCLES 0x01
DEFAULT_OPTIONS_RS_EVENTS_EMPTY_END EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_EDGE=1
UMASK_RS_EVENTS_EMPTY_END 0x01
EVENT_OFFCORE_REQUESTS_OUTSTANDING 0x60 PMC
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD 0x01
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_CODE_RD 0x02
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_RFO 0x04
UMASK_OFFCORE_REQUESTS_OUTSTANDING_ALL_DATA_RD 0x08
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_DATA_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DEMAND_DATA_RD 0x01
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DATA_RD EVENT_OPTION_THRESHOLD=0x1
UMASK_OFFCORE_REQUESTS_OUTSTANDING_CYCLES_WITH_DATA_RD 0x08
DEFAULT_OPTIONS_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD_C6 EVENT_OPTION_THRESHOLD=0x6
UMASK_OFFCORE_REQUESTS_OUTSTANDING_DEMAND_DATA_RD_C6 0x01
EVENT_LOCK_CYCLES 0x63 PMC
UMASK_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_DURATION 0x01
DEFAULT_OPTIONS_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_COUNT EVENT_OPTION_EDGE=0x1
UMASK_LOCK_CYCLES_SPLIT_LOCK_UC_LOCK_COUNT 0x01
UMASK_LOCK_CYCLES_CACHE_LOCK_DURATION 0x02
DEFAULT_OPTIONS_LOCK_CYCLES_CACHE_LOCK_COUNT EVENT_OPTION_EDGE=0x1
UMASK_LOCK_CYCLES_CACHE_LOCK_COUNT 0x02
EVENT_IDQ 0x79 PMC
UMASK_IDQ_EMPTY 0x02
UMASK_IDQ_MITE_UOPS 0x04
UMASK_IDQ_DSB_UOPS 0x08
UMASK_IDQ_MS_DSB_UOPS 0x10
UMASK_IDQ_MS_MITE_UOPS 0x20
UMASK_IDQ_MS_UOPS 0x30
UMASK_IDQ_DSB_ALL_UOPS 0x18
UMASK_IDQ_MITE_ALL_UOPS 0x24
UMASK_IDQ_ALL_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_MITE_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MITE_CYCLES_1_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MITE_CYCLES_2_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MITE_CYCLES_3_UOPS 0x04
DEFAULT_OPTIONS_IDQ_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MITE_CYCLES_4_UOPS 0x04
DEFAULT_OPTIONS_IDQ_DSB_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_DSB_CYCLES_1_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_DSB_CYCLES_2_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_DSB_CYCLES_3_UOPS 0x08
DEFAULT_OPTIONS_IDQ_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_DSB_CYCLES_4_UOPS 0x08
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_DSB_CYCLES_1_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_DSB_CYCLES_2_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_DSB_CYCLES_3_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_DSB_CYCLES_4_UOPS 0x10
DEFAULT_OPTIONS_IDQ_MS_DSB_OCCUR EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_DSB_OCCUR 0x10
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_MITE_CYCLES_1_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_MITE_CYCLES_2_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_MITE_CYCLES_3_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_MITE_CYCLES_4_UOPS 0x20
DEFAULT_OPTIONS_IDQ_MS_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_MS_CYCLES_1_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_MS_CYCLES_2_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_MS_CYCLES_3_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_MS_CYCLES_4_UOPS 0x30
DEFAULT_OPTIONS_IDQ_MS_SWITCHES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_IDQ_MS_SWITCHES 0x30
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_ANY_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_DSB_CYCLES_1_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_DSB_CYCLES_2_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_DSB_CYCLES_3_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_DSB_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_DSB_CYCLES_4_UOPS 0x18
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_ANY_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_MITE_CYCLES_1_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_MITE_CYCLES_2_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_MITE_CYCLES_3_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_MITE_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_MITE_CYCLES_4_UOPS 0x24
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_ANY_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_ANY_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_1_UOPS EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_ALL_CYCLES_1_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_2_UOPS EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_ALL_CYCLES_2_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_3_UOPS EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_ALL_CYCLES_3_UOPS 0x3C
DEFAULT_OPTIONS_IDQ_ALL_CYCLES_4_UOPS EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_ALL_CYCLES_4_UOPS 0x3C
EVENT_ICACHE 0x80 PMC
UMASK_ICACHE_HIT 0x01
UMASK_ICACHE_MISSES 0x02
UMASK_ICACHE_ACCESSES 0x03
UMASK_ICACHE_IFETCH_STALL 0x04
EVENT_ITLB_MISSES 0x85 PMC
UMASK_ITLB_MISSES_CAUSES_A_WALK 0x01
UMASK_ITLB_MISSES_WALK_COMPLETED_4K 0x02
UMASK_ITLB_MISSES_WALK_COMPLETED_LARGE 0x04
UMASK_ITLB_MISSES_WALK_COMPLETED 0x0E
UMASK_ITLB_MISSES_WALK_DURATION 0x10
UMASK_ITLB_MISSES_STLB_HIT_4K 0x20
UMASK_ITLB_MISSES_STLB_HIT_2M 0x40
UMASK_ITLB_MISSES_STLB_HIT 0x60
EVENT_ILD_STALL 0x87 PMC
UMASK_ILD_STALL_LCP 0x01
UMASK_ILD_STALL_IQ_FULL 0x04
EVENT_BR_INST_EXEC 0x88 PMC
UMASK_BR_INST_EXEC_COND_TAKEN 0x81
UMASK_BR_INST_EXEC_COND_NON_TAKEN 0x41
UMASK_BR_INST_EXEC_DIRECT_JMP_TAKEN 0x82
UMASK_BR_INST_EXEC_DIRECT_JMP_NON_TAKEN 0x42
UMASK_BR_INST_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN 0x84
UMASK_BR_INST_EXEC_INDIRECT_JMP_NON_CALL_RET_NON_TAKEN 0x44
UMASK_BR_INST_EXEC_RETURN_NEAR_TAKEN 0x88
UMASK_BR_INST_EXEC_RETURN_NEAR_NON_TAKEN 0x48
UMASK_BR_INST_EXEC_DIRECT_NEAR_CALL_TAKEN 0x90
UMASK_BR_INST_EXEC_DIRECT_NEAR_CALL_NON_TAKEN 0x50
UMASK_BR_INST_EXEC_INDIRECT_NEAR_CALL_TAKEN 0xA0
UMASK_BR_INST_EXEC_INDIRECT_NEAR_CALL_NON_TAKEN 0x60
UMASK_BR_INST_EXEC_ALL_CONDITIONAL 0xC1
UMASK_BR_INST_EXEC_ALL_DIRECT_JMP 0xC2
UMASK_BR_INST_EXEC_ALL_DIRECT_NEAR_CALL 0xD0
UMASK_BR_INST_EXEC_ALL_INDIRECT_JUMP_NON_CALL_RET 0xC4
UMASK_BR_INST_EXEC_ALL_INDIRECT_NEAR_RETURN 0xC8
UMASK_BR_INST_EXEC_ALL_BRANCHES 0xFF
EVENT_BR_MISP_EXEC 0x89 PMC
UMASK_BR_MISP_EXEC_COND_TAKEN 0x81
UMASK_BR_MISP_EXEC_COND_NON_TAKEN 0x41
UMASK_BR_MISP_EXEC_INDIRECT_JMP_NON_CALL_RET_TAKEN 0x84
UMASK_BR_MISP_EXEC_INDIRECT_JMP_NON_CALL_RET_NON_TAKEN 0x44
UMASK_BR_MISP_EXEC_RETURN_NEAR_TAKEN 0x88
UMASK_BR_MISP_EXEC_RETURN_NEAR_NON_TAKEN 0x48
UMASK_BR_MISP_EXEC_DIRECT_NEAR_CALL_TAKEN 0x90
UMASK_BR_MISP_EXEC_DIRECT_NEAR_CALL_NON_TAKEN 0x50
UMASK_BR_MISP_EXEC_INDIRECT_NEAR_CALL_TAKEN 0xA0
UMASK_BR_MISP_EXEC_INDIRECT_NEAR_CALL_NON_TAKEN 0x60
UMASK_BR_MISP_EXEC_ALL_CONDITIONAL 0xC1
UMASK_BR_MISP_EXEC_ALL_INDIRECT_JUMP_NON_CALL_RET 0xC4
UMASK_BR_MISP_EXEC_ALL_BRANCHES 0xFF
EVENT_IDQ_UOPS_NOT_DELIVERED 0x9C PMC
UMASK_IDQ_UOPS_NOT_DELIVERED_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE EVENT_OPTION_THRESHOLD=0x4
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_0_UOPS_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x3
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_1_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x2
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_2_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE EVENT_OPTION_THRESHOLD=0x1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_LE_3_UOP_DELIV_CORE 0x01
DEFAULT_OPTIONS_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_IDQ_UOPS_NOT_DELIVERED_CYCLES_FE_WAS_OK 0x01
EVENT_UOPS_EXECUTED_PORT 0xA1 PMC
UMASK_UOPS_EXECUTED_PORT_PORT_0 0x01
UMASK_UOPS_EXECUTED_PORT_PORT_1 0x02
UMASK_UOPS_EXECUTED_PORT_PORT_2 0x04
UMASK_UOPS_EXECUTED_PORT_PORT_3 0x08
UMASK_UOPS_EXECUTED_PORT_PORT_4 0x10
UMASK_UOPS_EXECUTED_PORT_PORT_5 0x20
UMASK_UOPS_EXECUTED_PORT_PORT_6 0x40
UMASK_UOPS_EXECUTED_PORT_PORT_7 0x80
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_0_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_0_CORE 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_1_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_1_CORE 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_2_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_2_CORE 0x04
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_3_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_3_CORE 0x08
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_4_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_4_CORE 0x10
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_5_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_5_CORE 0x20
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_6_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_6_CORE 0x40
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_PORT_7_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_PORT_7_CORE 0x80
UMASK_UOPS_EXECUTED_PORT_ARITH_PORTS 0x63
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_ARITH_PORTS_CORE EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_ARITH_PORTS_CORE 0x63
DEFAULT_OPTIONS_UOPS_EXECUTED_PORT_DATA_PORTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_EXECUTED_PORT_DATA_PORTS 0x9C
EVENT_RESOURCE_STALLS 0xA2 PMC
UMASK_RESOURCE_STALLS_ANY 0x01
UMASK_RESOURCE_STALLS_RS 0x04
UMASK_RESOURCE_STALLS_SB 0x08
UMASK_RESOURCE_STALLS_ROB 0x10
EVENT_CYCLE_ACTIVITY 0xA3 PMC
# Errata HSW62: May be unreliable in SMT mode
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L2_PENDING EVENT_OPTION_THRESHOLD=0x1
UMASK_CYCLE_ACTIVITY_CYCLES_L2_PENDING 0x01
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_MEM_ANY EVENT_OPTION_THRESHOLD=0x2
UMASK_CYCLE_ACTIVITY_CYCLES_MEM_ANY 0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_LDM_PENDING EVENT_OPTION_THRESHOLD=0x2
UMASK_CYCLE_ACTIVITY_CYCLES_LDM_PENDING 0x02
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE EVENT_OPTION_THRESHOLD=0x4
UMASK_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE 0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_TOTAL EVENT_OPTION_THRESHOLD=0x4
UMASK_CYCLE_ACTIVITY_STALLS_TOTAL 0x04
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L2_PENDING EVENT_OPTION_THRESHOLD=0x5
UMASK_CYCLE_ACTIVITY_STALLS_L2_PENDING 0x05
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_MEM_ANY EVENT_OPTION_THRESHOLD=0x6
UMASK_CYCLE_ACTIVITY_STALLS_MEM_ANY 0x06
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_LDM_PENDING EVENT_OPTION_THRESHOLD=0x6
UMASK_CYCLE_ACTIVITY_STALLS_LDM_PENDING 0x06
EVENT_CYCLE_ACTIVITY_CYCLES 0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_CYCLES_L1D_PENDING EVENT_OPTION_THRESHOLD=0x8
UMASK_CYCLE_ACTIVITY_CYCLES_L1D_PENDING 0x08
EVENT_CYCLE_ACTIVITY_STALLS 0xA3 PMC2
DEFAULT_OPTIONS_CYCLE_ACTIVITY_STALLS_L1D_PENDING EVENT_OPTION_THRESHOLD=0xC
UMASK_CYCLE_ACTIVITY_STALLS_L1D_PENDING 0x0C
EVENT_LSD_UOPS 0xA8 PMC
UMASK_LSD_UOPS 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_1 EVENT_OPTION_THRESHOLD=0x1
UMASK_LSD_UOPS_CYCLES_1 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_2 EVENT_OPTION_THRESHOLD=0x2
UMASK_LSD_UOPS_CYCLES_2 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_3 EVENT_OPTION_THRESHOLD=0x3
UMASK_LSD_UOPS_CYCLES_3 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_4 EVENT_OPTION_THRESHOLD=0x4
UMASK_LSD_UOPS_CYCLES_4 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_ACTIVE EVENT_OPTION_THRESHOLD=0x1
UMASK_LSD_UOPS_CYCLES_ACTIVE 0x01
DEFAULT_OPTIONS_LSD_UOPS_CYCLES_INACTIVE EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_LSD_UOPS_CYCLES_INACTIVE 0x01
EVENT_DSB2MITE_SWITCHES 0xAB PMC
UMASK_DSB2MITE_SWITCHES_COUNT 0x01
UMASK_DSB2MITE_SWITCHES_PENALTY_CYCLES 0x02
EVENT_ITLB 0xAE PMC
UMASK_ITLB_ITLB_FLUSH 0x01
EVENT_OFFCORE_REQUESTS 0xB0 PMC
UMASK_OFFCORE_REQUESTS_DEMAND_DATA_RD 0x01
UMASK_OFFCORE_REQUESTS_DEMAND_CODE_RD 0x02
UMASK_OFFCORE_REQUESTS_DEMAND_RFO 0x04
UMASK_OFFCORE_REQUESTS_ALL_DATA_RD 0x08
EVENT_UOPS_EXECUTED 0xB1 PMC
UMASK_UOPS_EXECUTED_THREAD 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CYCLES_GE_6_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CYCLES_GE_7_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CYCLES_GE_8_UOPS_EXEC 0x01
UMASK_UOPS_EXECUTED_CORE 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_USED_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_STALL_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_EXECUTED_CORE_TOTAL_CYCLES 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_1_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_2_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_3_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_4_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_5_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_6_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x7
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_7_UOPS_EXEC 0x02
DEFAULT_OPTIONS_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x8
UMASK_UOPS_EXECUTED_CORE_CYCLES_GE_8_UOPS_EXEC 0x02
EVENT_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0xB2 PMC
UMASK_OFFCORE_REQUESTS_BUFFER_SQ_FULL 0x01
EVENT_PAGE_WALKER_LOADS 0xBC PMC
UMASK_PAGE_WALKER_LOADS_DTLB_L1 0x11
UMASK_PAGE_WALKER_LOADS_ITLB_L1 0x21
UMASK_PAGE_WALKER_LOADS_DTLB_L2 0x12
UMASK_PAGE_WALKER_LOADS_ITLB_L2 0x22
UMASK_PAGE_WALKER_LOADS_DTLB_L3 0x14
UMASK_PAGE_WALKER_LOADS_ITLB_L3 0x24
UMASK_PAGE_WALKER_LOADS_DTLB_MEMORY 0x18
UMASK_PAGE_WALKER_LOADS_ITLB_MEMORY 0x28
UMASK_PAGE_WALKER_LOADS_EPT_DTLB_L1 0x41
UMASK_PAGE_WALKER_LOADS_EPT_ITLB_L1 0x81
UMASK_PAGE_WALKER_LOADS_EPT_DTLB_L2 0x42
UMASK_PAGE_WALKER_LOADS_EPT_ITLB_L2 0x82
UMASK_PAGE_WALKER_LOADS_EPT_DTLB_L3 0x44
UMASK_PAGE_WALKER_LOADS_EPT_ITLB_L3 0x84
UMASK_PAGE_WALKER_LOADS_EPT_DTLB_MEMORY 0x48
UMASK_PAGE_WALKER_LOADS_EPT_ITLB_MEMORY 0x88
EVENT_TLB_FLUSH 0xBD PMC
UMASK_TLB_FLUSH_DTLB_THREAD 0x01
UMASK_TLB_FLUSH_STLB_ANY 0x20
EVENT_INST_RETIRED_PREC 0xC0 PMC1
UMASK_INST_RETIRED_PREC_DIST 0x01
EVENT_INST_RETIRED_ANY 0xC0 PMC
UMASK_INST_RETIRED_ANY_P 0x00
EVENT_OTHER_ASSISTS 0xC1 PMC
UMASK_OTHER_ASSISTS_AVX_TO_SSE 0x08
UMASK_OTHER_ASSISTS_SSE_TO_AVX 0x10
UMASK_OTHER_ASSISTS_ANY_WB_ASSIST 0x40
EVENT_UOPS_RETIRED 0xC2 PMC
UMASK_UOPS_RETIRED_ALL 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_ALL EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_ALL 0x01
UMASK_UOPS_RETIRED_RETIRE_SLOTS 0x02
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_RETIRE_SLOTS EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_RETIRE_SLOTS 0x02
DEFAULT_OPTIONS_UOPS_RETIRED_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1
UMASK_UOPS_RETIRED_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_USED_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_USED_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_STALL_CYCLES EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_STALL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CORE_TOTAL_CYCLES EVENT_OPTION_THRESHOLD=0xA,EVENT_OPTION_INVERT=1,EVENT_OPTION_ANYTHREAD=1
UMASK_UOPS_RETIRED_CORE_TOTAL_CYCLES 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x1
UMASK_UOPS_RETIRED_CYCLES_GE_1_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x2
UMASK_UOPS_RETIRED_CYCLES_GE_2_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x3
UMASK_UOPS_RETIRED_CYCLES_GE_3_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x4
UMASK_UOPS_RETIRED_CYCLES_GE_4_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x5
UMASK_UOPS_RETIRED_CYCLES_GE_5_UOPS_EXEC 0x01
DEFAULT_OPTIONS_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC EVENT_OPTION_THRESHOLD=0x6
UMASK_UOPS_RETIRED_CYCLES_GE_6_UOPS_EXEC 0x01
EVENT_MACHINE_CLEARS 0xC3 PMC
UMASK_MACHINE_CLEARS_CYCLES 0x01
DEFAULT_OPTIONS_MACHINE_CLEARS_COUNT EVENT_OPTION_THRESHOLD=0x1,EVENT_OPTION_EDGE=1
UMASK_MACHINE_CLEARS_COUNT 0x01
UMASK_MACHINE_CLEARS_MEMORY_ORDERING 0x02
UMASK_MACHINE_CLEARS_SMC 0x04
UMASK_MACHINE_CLEARS_MASKMOV 0x20
EVENT_BR_INST_RETIRED 0xC4 PMC
UMASK_BR_INST_RETIRED_ALL_BRANCHES 0x00
UMASK_BR_INST_RETIRED_CONDITIONAL 0x01
UMASK_BR_INST_RETIRED_NEAR_CALL 0x02
# This event is only usable with Intel PEBS. Intel PEBS is not supported by
# LIKWID.
#UMASK_BR_INST_RETIRED_ALL_BRANCHES 0x04
UMASK_BR_INST_RETIRED_NEAR_RETURN 0x08
UMASK_BR_INST_RETIRED_NOT_TAKEN 0x10
UMASK_BR_INST_RETIRED_NEAR_TAKEN 0x20
UMASK_BR_INST_RETIRED_FAR_BRANCH 0x40
EVENT_BR_MISP_RETIRED 0xC5 PMC
UMASK_BR_MISP_RETIRED_ALL_BRANCHES 0x00
UMASK_BR_MISP_RETIRED_CONDITIONAL 0x01
UMASK_BR_MISP_RETIRED_NEAR_NOT_TAKEN 0x10
UMASK_BR_MISP_RETIRED_NEAR_TAKEN 0x20
EVENT_AVX_INSTS 0xC6 PMC
UMASK_AVX_INSTS_LOADS 0x01
UMASK_AVX_INSTS_STORES 0x02
UMASK_AVX_INSTS_CALC 0x04
UMASK_AVX_INSTS_ALL 0x07
EVENT_HLE_RETIRED 0xC8 PMC
UMASK_HLE_RETIRED_START 0x01
UMASK_HLE_RETIRED_COMMIT 0x02
UMASK_HLE_RETIRED_ABORTED 0x04
UMASK_HLE_RETIRED_ABORTED_MISC1 0x08
UMASK_HLE_RETIRED_ABORTED_MISC2 0x10
UMASK_HLE_RETIRED_ABORTED_MISC3 0x20
UMASK_HLE_RETIRED_ABORTED_MISC4 0x40
UMASK_HLE_RETIRED_ABORTED_MISC5 0x80
EVENT_RTM_RETIRED 0xC9 PMC
UMASK_RTM_RETIRED_START 0x01
UMASK_RTM_RETIRED_COMMIT 0x02
UMASK_RTM_RETIRED_ABORTED 0x04
UMASK_RTM_RETIRED_ABORTED_MISC1 0x08
UMASK_RTM_RETIRED_ABORTED_MISC2 0x10
UMASK_RTM_RETIRED_ABORTED_MISC3 0x20
UMASK_RTM_RETIRED_ABORTED_MISC4 0x40
UMASK_RTM_RETIRED_ABORTED_MISC5 0x80
EVENT_FP_ASSIST 0xCA PMC
UMASK_FP_ASSIST_X87_OUTPUT 0x02
UMASK_FP_ASSIST_X87_INPUT 0x04
UMASK_FP_ASSIST_SIMD_OUTPUT 0x08
UMASK_FP_ASSIST_SIMD_INPUT 0x10
DEFAULT_OPTIONS_FP_ASSIST_ANY EVENT_OPTION_THRESHOLD=0x1
UMASK_FP_ASSIST_ANY 0x1E
EVENT_ROB_MISC_EVENT_LBR_INSERTS 0xCC PMC
UMASK_ROB_MISC_EVENT_LBR_INSERTS 0x20
EVENT_MEM_UOPS_RETIRED 0xD0 PMC
UMASK_MEM_UOPS_RETIRED_LOADS 0x81
UMASK_MEM_UOPS_RETIRED_STORES 0x82
UMASK_MEM_UOPS_RETIRED_ALL 0x83
UMASK_MEM_UOPS_RETIRED_LOADS_STLB_MISS 0x11
UMASK_MEM_UOPS_RETIRED_STORES_STLB_MISS 0x12
UMASK_MEM_UOPS_RETIRED_LOADS_LOCK 0x21
UMASK_MEM_UOPS_RETIRED_STORES_LOCK 0x22
UMASK_MEM_UOPS_RETIRED_LOADS_SPLIT 0x41
UMASK_MEM_UOPS_RETIRED_STORES_SPLIT 0x42
EVENT_MEM_LOAD_UOPS_RETIRED 0xD1 PMC
UMASK_MEM_LOAD_UOPS_RETIRED_L1_HIT 0x01
UMASK_MEM_LOAD_UOPS_RETIRED_L1_MISS 0x08
UMASK_MEM_LOAD_UOPS_RETIRED_L1_ALL 0x09
UMASK_MEM_LOAD_UOPS_RETIRED_L2_HIT 0x02
UMASK_MEM_LOAD_UOPS_RETIRED_L2_MISS 0x10
UMASK_MEM_LOAD_UOPS_RETIRED_L2_ALL 0x12
UMASK_MEM_LOAD_UOPS_RETIRED_L3_HIT 0x04
UMASK_MEM_LOAD_UOPS_RETIRED_L3_MISS 0x20
UMASK_MEM_LOAD_UOPS_RETIRED_L3_ALL 0x24
UMASK_MEM_LOAD_UOPS_RETIRED_HIT_LFB 0x40
UMASK_MEM_LOAD_UOPS_RETIRED_ALL_MISS 0x38
UMASK_MEM_LOAD_UOPS_RETIRED_ALL_HIT 0x07
UMASK_MEM_LOAD_UOPS_RETIRED_ALL_ALL 0x3F
EVENT_MEM_LOAD_UOPS_L3_HIT_RETIRED 0xD2 PMC
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_MISS 0x01
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HIT 0x02
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_HITM 0x04
UMASK_MEM_LOAD_UOPS_L3_HIT_RETIRED_XSNP_NONE 0x08
EVENT_MEM_LOAD_UOPS_L3_MISS_RETIRED 0xD3 PMC
UMASK_MEM_LOAD_UOPS_L3_MISS_RETIRED_LOCAL_DRAM 0x01
UMASK_MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_DRAM 0x04
UMASK_MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_HITM 0x10
UMASK_MEM_LOAD_UOPS_L3_MISS_RETIRED_REMOTE_FWD 0x20
EVENT_BACLEARS 0xE6 PMC
UMASK_BACLEARS_ANY 0x1F
EVENT_L2_TRANS 0xF0 PMC
UMASK_L2_TRANS_DEMAND_DATA_RD 0x01
UMASK_L2_TRANS_RFO 0x02
UMASK_L2_TRANS_CODE_RD 0x04
UMASK_L2_TRANS_ALL_PF 0x08
UMASK_L2_TRANS_L1D_WB 0x10
UMASK_L2_TRANS_L2_FILL 0x20
UMASK_L2_TRANS_L2_WB 0x40
UMASK_L2_TRANS_ALL_REQUESTS 0x80
EVENT_L2_LINES_IN 0xF1 PMC
UMASK_L2_LINES_IN_I 0x01
UMASK_L2_LINES_IN_S 0x02
UMASK_L2_LINES_IN_E 0x04
UMASK_L2_LINES_IN_ALL 0x07
EVENT_L2_LINES_OUT 0xF2 PMC
UMASK_L2_LINES_OUT_DEMAND_CLEAN 0x05
UMASK_L2_LINES_OUT_DEMAND_DIRTY 0x06
EVENT_OFFCORE_RESPONSE_0 0xB7 PMC
OPTIONS_OFFCORE_RESPONSE_0_OPTIONS EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_0_OPTIONS 0x01 0xFF 0xFF
OPTIONS_OFFCORE_RESPONSE_0_LOCAL_DRAM EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
DEFAULT_OPTIONS_OFFCORE_RESPONSE_0_LOCAL_DRAM EVENT_OPTION_MATCH0=0x8FFF,EVENT_OPTION_MATCH1=0x60040
UMASK_OFFCORE_RESPONSE_0_LOCAL_DRAM 0x01 0xFF 0xFF
OPTIONS_OFFCORE_RESPONSE_0_REMOTE_DRAM EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
DEFAULT_OPTIONS_OFFCORE_RESPONSE_0_REMOTE_DRAM EVENT_OPTION_MATCH0=0x8FFF,EVENT_OPTION_MATCH1=0x67F80
UMASK_OFFCORE_RESPONSE_0_REMOTE_DRAM 0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_0_DMND_DATA_RD_ANY 0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_RFO_ANY 0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_0_DMND_CODE_RD_ANY 0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_0_WB_ANY 0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_DATA_RD_ANY 0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_RFO_ANY 0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L2_CODE_RD_ANY 0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_DATA_RD_ANY 0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_RFO_ANY 0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_0_PF_L3_CODE_RD_ANY 0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_0_SPLIT_LOCK_UC_LOCK_ANY 0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_0_STREAMING_STORES_ANY 0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_0_OTHER_ANY 0x01 0x0F 0x10
EVENT_OFFCORE_RESPONSE_1 0xBB PMC
OPTIONS_OFFCORE_RESPONSE_1_OPTIONS EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
UMASK_OFFCORE_RESPONSE_1_OPTIONS 0x01 0xFF 0xFF
OPTIONS_OFFCORE_RESPONSE_1_LOCAL_DRAM EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
DEFAULT_OPTIONS_OFFCORE_RESPONSE_1_LOCAL_DRAM EVENT_OPTION_MATCH0=0x08FFF,EVENT_OPTION_MATCH1=0x60040
UMASK_OFFCORE_RESPONSE_1_LOCAL_DRAM 0x01 0xFF 0xFF
OPTIONS_OFFCORE_RESPONSE_1_REMOTE_DRAM EVENT_OPTION_MATCH0_MASK|EVENT_OPTION_MATCH1_MASK
DEFAULT_OPTIONS_OFFCORE_RESPONSE_1_REMOTE_DRAM EVENT_OPTION_MATCH0=0x08FFF,EVENT_OPTION_MATCH1=0x67F80
UMASK_OFFCORE_RESPONSE_1_REMOTE_DRAM 0x01 0xFF 0xFF
UMASK_OFFCORE_RESPONSE_1_DMND_DATA_RD_ANY 0x01 0x00 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_RFO_ANY 0x01 0x01 0x10
UMASK_OFFCORE_RESPONSE_1_DMND_CODE_RD_ANY 0x01 0x02 0x10
UMASK_OFFCORE_RESPONSE_1_WB_ANY 0x01 0x03 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_DATA_RD_ANY 0x01 0x04 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_RFO_ANY 0x01 0x05 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L2_CODE_RD_ANY 0x01 0x06 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_DATA_RD_ANY 0x01 0x07 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_RFO_ANY 0x01 0x08 0x10
UMASK_OFFCORE_RESPONSE_1_PF_L3_CODE_RD_ANY 0x01 0x09 0x10
UMASK_OFFCORE_RESPONSE_1_SPLIT_LOCK_UC_LOCK_ANY 0x01 0x0A 0x10
UMASK_OFFCORE_RESPONSE_1_STREAMING_STORES_ANY 0x01 0x0B 0x10
UMASK_OFFCORE_RESPONSE_1_OTHER_ANY 0x01 0x0F 0x10
EVENT_CBOX_CLOCKTICKS 0x00 CBOX
UMASK_CBOX_CLOCKTICKS 0x00
EVENT_TXR_INSERTS 0x02 CBOX
UMASK_TXR_INSERTS_AD_CACHE 0x01
UMASK_TXR_INSERTS_AK_CACHE 0x02
UMASK_TXR_INSERTS_BL_CACHE 0x04
UMASK_TXR_INSERTS_IV_CACHE 0x08
UMASK_TXR_INSERTS_AD_CORE 0x10
UMASK_TXR_INSERTS_AK_CORE 0x20
UMASK_TXR_INSERTS_BL_CORE 0x40
EVENT_TXR_ADS_USED 0x04 CBOX
UMASK_TXR_ADS_USED_AD 0x01
UMASK_TXR_ADS_USED_AK 0x02
UMASK_TXR_ADS_USED_BL 0x04
EVENT_RING_BOUNCES 0x05 CBOX
UMASK_RING_BOUNCES_AD 0x01
UMASK_RING_BOUNCES_AK 0x02
UMASK_RING_BOUNCES_BL 0x04
UMASK_RING_BOUNCES_IV 0x08
EVENT_RING_SRC_THRTL 0x07 CBOX
UMASK_RING_SRC_THRTL 0x00
EVENT_FAST_ASSERTED 0x09 CBOX0C0|CBOX0C1|CBOX1C0|CBOX1C1|CBOX2C0|CBOX2C1|CBOX3C0|CBOX3C1|CBOX4C0|CBOX4C1|CBOX5C0|CBOX5C1|CBOX6C0|CBOX6C1|CBOX7C0|CBOX7C1|CBOX8C0|CBOX8C1|CBOX9C0|CBOX9C1|CBOX10C0|CBOX10C1|CBOX11C0|CBOX11C1|CBOX12C0|CBOX12C1|CBOX13C0|CBOX13C1|CBOX14C0|CBOX14C1|CBOX15C0|CBOX15C1|CBOX16C0|CBOX16C1|CBOX17C0|CBOX17C1
UMASK_FAST_ASSERTED 0x00
EVENT_BOUNCE_CONTROL 0xA CBOX
UMASK_BOUNCE_CONTROL 0x00
EVENT_RXR_OCCUPANCY 0x11 CBOX0C0|CBOX1C0|CBOX2C0|CBOX3C0|CBOX4C0|CBOX5C0|CBOX6C0|CBOX7C0|CBOX8C0|CBOX9C0|CBOX10C0|CBOX11C0|CBOX12C0|CBOX13C0|CBOX14C0|CBOX15C0|CBOX16C0|CBOX17C0
UMASK_RXR_OCCUPANCY_IRQ 0x01
UMASK_RXR_OCCUPANCY_IRQ_REJ 0x02
UMASK_RXR_OCCUPANCY_IPQ 0x04
UMASK_RXR_OCCUPANCY_PRQ_REJ 0x20
UMASK_RXR_OCCUPANCY_IRQ_IPQ 0x05
UMASK_RXR_OCCUPANCY_IRQ_PRQ_REJ 0x21
UMASK_RXR_OCCUPANCY_IPQ_PRQ_REJ 0x24
EVENT_RXR_EXT_STARVED 0x12 CBOX
UMASK_RXR_EXT_STARVED_IRQ 0x01
UMASK_RXR_EXT_STARVED_IPQ 0x02
UMASK_RXR_EXT_STARVED_PRQ 0x04
UMASK_RXR_EXT_STARVED_ISMQ_BIDS 0x08
EVENT_RXR_INSERTS 0x13 CBOX
UMASK_RXR_INSERTS_IRQ 0x01
UMASK_RXR_INSERTS_IRQ_REJ 0x02
UMASK_RXR_INSERTS_IPQ 0x04
UMASK_RXR_INSERTS_PRQ 0x10
UMASK_RXR_INSERTS_PRQ_REJ 0x20
EVENT_RING_AD_USED 0x1B CBOX
UMASK_RING_AD_USED_UP_EVEN 0x01
UMASK_RING_AD_USED_UP_ODD 0x02
UMASK_RING_AD_USED_UP 0x03
UMASK_RING_AD_USED_DOWN_EVEN 0x04
UMASK_RING_AD_USED_DOWN_ODD 0x08
UMASK_RING_AD_USED_DOWN 0x0C
UMASK_RING_AD_USED_ANY 0x0F
EVENT_RING_AK_USED 0x1C CBOX
UMASK_RING_AK_USED_UP_EVEN 0x01
UMASK_RING_AK_USED_UP_ODD 0x02
UMASK_RING_AK_USED_UP 0x03
UMASK_RING_AK_USED_DOWN_EVEN 0x04
UMASK_RING_AK_USED_DOWN_ODD 0x08
UMASK_RING_AK_USED_DOWN 0x0C
UMASK_RING_AK_USED_ANY 0x0F
EVENT_RING_BL_USED 0x1D CBOX
UMASK_RING_BL_USED_UP_EVEN 0x01
UMASK_RING_BL_USED_UP_ODD 0x02
UMASK_RING_BL_USED_UP 0x03
UMASK_RING_BL_USED_DOWN_EVEN 0x04
UMASK_RING_BL_USED_DOWN_ODD 0x08
UMASK_RING_BL_USED_DOWN 0x0C
UMASK_RING_BL_USED_ANY 0x0F
EVENT_RING_IV_USED 0x1E CBOX
UMASK_RING_IV_USED_UP 0x03
UMASK_RING_IV_USED_DN 0x0C
UMASK_RING_IV_USED_ANY 0x0F
EVENT_COUNTER0_OCCUPANCY 0x1F CBOX
UMASK_COUNTER0_OCCUPANCY 0x00
EVENT_RXR_IPQ_RETRY2 0x28 CBOX
UMASK_RXR_IPQ_RETRY2_AD_SBO 0x01
OPTIONS_RXR_IPQ_RETRY2_TARGET EVENT_OPTION_NID_MASK
UMASK_RXR_IPQ_RETRY2_TARGET 0x40
EVENT_RXR_IRQ_RETRY2 0x29 CBOX
UMASK_RXR_IRQ_RETRY2_AD_SBO 0x01
UMASK_RXR_IRQ_RETRY2_BL_SBO 0x02
OPTIONS_RXR_IRQ_RETRY2_TARGET EVENT_OPTION_NID_MASK
UMASK_RXR_IRQ_RETRY2_TARGET 0x40
EVENT_RXR_ISMQ_RETRY2 0x2A CBOX
UMASK_RXR_ISMQ_RETRY2_AD_SBO 0x01
UMASK_RXR_ISMQ_RETRY2_BL_SBO 0x02
OPTIONS_RXR_ISMQ_RETRY2_TARGET EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY2_TARGET 0x40
EVENT_RXR_IPQ_RETRY 0x31 CBOX
UMASK_RXR_IPQ_RETRY_ANY 0x01
UMASK_RXR_IPQ_RETRY_FULL 0x02
UMASK_RXR_IPQ_RETRY_ADDR_CONFLICT 0x04
UMASK_RXR_IPQ_RETRY_QPI_CREDITS 0x10
EVENT_RXR_IRQ_RETRY 0x32 CBOX
UMASK_RXR_IRQ_RETRY_ANY 0x01
UMASK_RXR_IRQ_RETRY_FULL 0x02
UMASK_RXR_IRQ_RETRY_ADDR_CONFLICT 0x04
UMASK_RXR_IRQ_RETRY_RTID 0x01
UMASK_RXR_IRQ_RETRY_QPI_CREDITS 0x01
UMASK_RXR_IRQ_RETRY_IIO_CREDITS 0x01
OPTIONS_RXR_IRQ_RETRY_NID EVENT_OPTION_NID_MASK
UMASK_RXR_IRQ_RETRY_NID 0x01
EVENT_RXR_ISMQ_RETRY 0x33 CBOX
UMASK_RXR_ISMQ_RETRY_ANY 0x01
UMASK_RXR_ISMQ_RETRY_FULL 0x02
UMASK_RXR_ISMQ_RETRY_RTID 0x08
UMASK_RXR_ISMQ_RETRY_QPI_CREDITS 0x10
UMASK_RXR_ISMQ_RETRY_IIO_CREDITS 0x20
OPTIONS_RXR_ISMQ_RETRY_NID EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY_NID 0x40
OPTIONS_RXR_ISMQ_RETRY_WB_CREDITS EVENT_OPTION_NID_MASK
UMASK_RXR_ISMQ_RETRY_WB_CREDITS 0x80
EVENT_LLC_LOOKUP 0x34 CBOX
OPTIONS_LLC_LOOKUP_DATA_READ EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_DATA_READ 0x03
OPTIONS_LLC_LOOKUP_WRITE EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_WRITE 0x05
OPTIONS_LLC_LOOKUP_REMOTE_SNOOP EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_REMOTE_SNOOP 0x09
OPTIONS_LLC_LOOKUP_ANY EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_ANY 0x11
OPTIONS_LLC_LOOKUP_READ EVENT_OPTION_STATE_MASK
UMASK_LLC_LOOKUP_READ 0x21
OPTIONS_LLC_LOOKUP_NID_MASK EVENT_OPTION_STATE_MASK|EVENT_OPTION_NID_MASK
UMASK_LLC_LOOKUP_NID 0x41
EVENT_TOR_INSERTS 0x35 CBOX
UMASK_TOR_INSERTS_ALL 0x08
UMASK_TOR_INSERTS_WB 0x10
OPTIONS_TOR_INSERTS_LOCAL_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_LOCAL_OPCODE 0x21
OPTIONS_TOR_INSERTS_MISS_LOCAL_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_MISS_LOCAL_OPCODE 0x23
UMASK_TOR_INSERTS_LOCAL 0x28
UMASK_TOR_INSERTS_MISS_LOCAL 0x2A
OPTIONS_TOR_INSERTS_NID_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_NID_OPCODE 0x41
OPTIONS_TOR_INSERTS_NID_MISS_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_NID_MISS_OPCODE 0x43
OPTIONS_TOR_INSERTS_NID_EVICION EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_EVICION 0x44
OPTIONS_TOR_INSERTS_NID_ALL EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_ALL 0x48
OPTIONS_TOR_INSERTS_NID_MISS_ALL EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_MISS_ALL 0x4A
OPTIONS_TOR_INSERTS_NID_WB EVENT_OPTION_NID_MASK
UMASK_TOR_INSERTS_NID_WB 0x50
OPTIONS_TOR_INSERTS_REMOTE_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_REMOTE_OPCODE 0x81
OPTIONS_TOR_INSERTS_MISS_REMOTE_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_INSERTS_MISS_REMOTE_OPCODE 0x83
UMASK_TOR_INSERTS_REMOTE 0x88
UMASK_TOR_INSERTS_MISS_REMOTE 0x8A
EVENT_TOR_OCCUPANCY 0x36 CBOX0C0|CBOX1C0|CBOX2C0|CBOX3C0|CBOX4C0|CBOX5C0|CBOX6C0|CBOX7C0|CBOX8C0|CBOX9C0|CBOX10C0|CBOX11C0|CBOX12C0|CBOX13C0|CBOX14C0|CBOX15C0|CBOX16C0|CBOX17C0
OPTIONS_TOR_OCCUPANCY_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_OPCODE 0x01
OPTIONS_TOR_OCCUPANCY_MISS_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_MISS_OPCODE 0x03
UMASK_TOR_OCCUPANCY_EVICTION 0x04
UMASK_TOR_OCCUPANCY_ALL 0x08
UMASK_TOR_OCCUPANCY_MISS_ALL 0x0A
UMASK_TOR_OCCUPANCY_WB 0x10
UMASK_TOR_OCCUPANCY_LOCAL_OPCODE 0x21
UMASK_TOR_OCCUPANCY_MISS_LOCAL_OPCODE 0x23
UMASK_TOR_OCCUPANCY_LOCAL 0x28
UMASK_TOR_OCCUPANCY_MISS_LOCAL 0x2A
OPTIONS_TOR_OCCUPANCY_NID_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_NID_OPCODE 0x41
OPTIONS_TOR_OCCUPANCY_NID_MISS_OPCODE EVENT_OPTION_NID_MASK|EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_NID_MISS_OPCODE 0x43
OPTIONS_TOR_OCCUPANCY_NID_EVICTION EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_EVICTION 0x44
OPTIONS_TOR_OCCUPANCY_NID_ALL EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_ALL 0x48
OPTIONS_TOR_OCCUPANCY_NID_MISS_ALL EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_MISS_ALL 0x4A
OPTIONS_TOR_OCCUPANCY_NID_WB EVENT_OPTION_NID_MASK
UMASK_TOR_OCCUPANCY_NID_WB 0x50
OPTIONS_TOR_OCCUPANCY_REMOTE_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_REMOTE_OPCODE 0x81
OPTIONS_TOR_OCCUPANCY_MISS_REMOTE_OPCODE EVENT_OPTION_OPCODE_MASK
UMASK_TOR_OCCUPANCY_MISS_REMOTE_OPCODE 0x83
UMASK_TOR_OCCUPANCY_REMOTE 0x88