From 7f5008c8293a4d1eb3e4557a36a6bfdef34de284 Mon Sep 17 00:00:00 2001 From: est31 Date: Wed, 30 Sep 2020 17:46:18 +0200 Subject: [PATCH 1/2] Backport LLVM apfloat commit to rustc_apfloat Backports LLVM commit: https://github.com/llvm/llvm-project/commit/e34bd1e0b03d20a506ada156d87e1b3a96d82fa2 Fixes #69532 --- compiler/rustc_apfloat/src/ieee.rs | 12 ++++++++++++ compiler/rustc_apfloat/tests/ieee.rs | 9 +++++++++ src/test/ui/issues/issue-69532.rs | 24 ++++++++++++++++++++++++ 3 files changed, 45 insertions(+) create mode 100644 src/test/ui/issues/issue-69532.rs diff --git a/compiler/rustc_apfloat/src/ieee.rs b/compiler/rustc_apfloat/src/ieee.rs index e3d941cad7ae5..aafd6dfb89a25 100644 --- a/compiler/rustc_apfloat/src/ieee.rs +++ b/compiler/rustc_apfloat/src/ieee.rs @@ -1511,6 +1511,18 @@ impl FloatConvert> for IeeeFloat { sig::set_bit(&mut r.sig, T::PRECISION - 1); } + // If we are truncating NaN, it is possible that we shifted out all of the + // set bits in a signalling NaN payload. But NaN must remain NaN, so some + // bit in the significand must be set (otherwise it is Inf). + // This can only happen with sNaN. Set the 1st bit after the quiet bit, + // so that we still have an sNaN. + if r.sig[0] == 0 { + assert!(shift < 0, "Should not lose NaN payload on extend"); + assert!(T::PRECISION >= 3, "Unexpectedly narrow significand"); + assert!(*loses_info, "Missing payload should have set lost info"); + sig::set_bit(&mut r.sig, T::PRECISION - 3); + } + // gcc forces the Quiet bit on, which means (float)(double)(float_sNan) // does not give you back the same bits. This is dubious, and we // don't currently do it. You're really supposed to get diff --git a/compiler/rustc_apfloat/tests/ieee.rs b/compiler/rustc_apfloat/tests/ieee.rs index 2d8bb7d1e8e03..0f3c99fba9e24 100644 --- a/compiler/rustc_apfloat/tests/ieee.rs +++ b/compiler/rustc_apfloat/tests/ieee.rs @@ -566,6 +566,15 @@ fn fma() { } } +#[test] +fn issue_69532() { + let f = Double::from_bits(0x7FF0_0000_0000_0001u64 as u128); + let mut loses_info = false; + let r: Single = f.convert(&mut loses_info).value; + assert!(loses_info); + assert!(r.is_nan()); +} + #[test] fn min_num() { let f1 = Double::from_f64(1.0); diff --git a/src/test/ui/issues/issue-69532.rs b/src/test/ui/issues/issue-69532.rs new file mode 100644 index 0000000000000..81007b15074f7 --- /dev/null +++ b/src/test/ui/issues/issue-69532.rs @@ -0,0 +1,24 @@ +// run-pass +#![feature(const_fn_transmute)] + +const fn make_nans() -> (f64, f64, f32, f32) { + let nan1: f64 = unsafe { std::mem::transmute(0x7FF0_0001_0000_0001u64) }; + let nan2: f64 = unsafe { std::mem::transmute(0x7FF0_0000_0000_0001u64) }; + + let nan1_32 = nan1 as f32; + let nan2_32 = nan2 as f32; + + (nan1, nan2, nan1_32, nan2_32) +} + +static NANS: (f64, f64, f32, f32) = make_nans(); + +fn main() { + let (nan1, nan2, nan1_32, nan2_32) = NANS; + + assert!(nan1.is_nan()); + assert!(nan2.is_nan()); + + assert!(nan1_32.is_nan()); + assert!(nan2_32.is_nan()); +} From d010809c8c0062a4c7a3249254a5193dd1ca15c7 Mon Sep 17 00:00:00 2001 From: est31 Date: Sat, 3 Oct 2020 22:01:22 +0200 Subject: [PATCH 2/2] Backport another LLVM commit to rustc_apfloat Backports LLVM commit: [APFloat] convert SNaN to QNaN in convert() and raise Invalid signal https://github.com/llvm/llvm-project/commit/149f5b573c79eac0c519ada4d2f7c50e17796cdf SNaN to QNaN conversion also matches what my Intel x86_64 hardware does. --- compiler/rustc_apfloat/src/ieee.rs | 27 ++++++++++----------------- compiler/rustc_apfloat/tests/ieee.rs | 27 +++++++++++++++++---------- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/compiler/rustc_apfloat/src/ieee.rs b/compiler/rustc_apfloat/src/ieee.rs index aafd6dfb89a25..71bcb8f090d07 100644 --- a/compiler/rustc_apfloat/src/ieee.rs +++ b/compiler/rustc_apfloat/src/ieee.rs @@ -1511,23 +1511,16 @@ impl FloatConvert> for IeeeFloat { sig::set_bit(&mut r.sig, T::PRECISION - 1); } - // If we are truncating NaN, it is possible that we shifted out all of the - // set bits in a signalling NaN payload. But NaN must remain NaN, so some - // bit in the significand must be set (otherwise it is Inf). - // This can only happen with sNaN. Set the 1st bit after the quiet bit, - // so that we still have an sNaN. - if r.sig[0] == 0 { - assert!(shift < 0, "Should not lose NaN payload on extend"); - assert!(T::PRECISION >= 3, "Unexpectedly narrow significand"); - assert!(*loses_info, "Missing payload should have set lost info"); - sig::set_bit(&mut r.sig, T::PRECISION - 3); - } - - // gcc forces the Quiet bit on, which means (float)(double)(float_sNan) - // does not give you back the same bits. This is dubious, and we - // don't currently do it. You're really supposed to get - // an invalid operation signal at runtime, but nobody does that. - status = Status::OK; + // Convert of sNaN creates qNaN and raises an exception (invalid op). + // This also guarantees that a sNaN does not become Inf on a truncation + // that loses all payload bits. + if self.is_signaling() { + // Quiet signaling NaN. + sig::set_bit(&mut r.sig, T::QNAN_BIT); + status = Status::INVALID_OP; + } else { + status = Status::OK; + } } else { *loses_info = false; status = Status::OK; diff --git a/compiler/rustc_apfloat/tests/ieee.rs b/compiler/rustc_apfloat/tests/ieee.rs index 0f3c99fba9e24..63d925cce9ad7 100644 --- a/compiler/rustc_apfloat/tests/ieee.rs +++ b/compiler/rustc_apfloat/tests/ieee.rs @@ -570,9 +570,11 @@ fn fma() { fn issue_69532() { let f = Double::from_bits(0x7FF0_0000_0000_0001u64 as u128); let mut loses_info = false; - let r: Single = f.convert(&mut loses_info).value; + let sta = f.convert(&mut loses_info); + let r: Single = sta.value; assert!(loses_info); assert!(r.is_nan()); + assert_eq!(sta.status, Status::INVALID_OP); } #[test] @@ -1501,27 +1503,32 @@ fn convert() { assert_eq!(4294967295.0, test.to_f64()); assert!(!loses_info); - let test = Single::snan(None); - let x87_snan = X87DoubleExtended::snan(None); - let test: X87DoubleExtended = test.convert(&mut loses_info).value; - assert!(test.bitwise_eq(x87_snan)); - assert!(!loses_info); - let test = Single::qnan(None); let x87_qnan = X87DoubleExtended::qnan(None); let test: X87DoubleExtended = test.convert(&mut loses_info).value; assert!(test.bitwise_eq(x87_qnan)); assert!(!loses_info); - let test = X87DoubleExtended::snan(None); - let test: X87DoubleExtended = test.convert(&mut loses_info).value; - assert!(test.bitwise_eq(x87_snan)); + let test = Single::snan(None); + let sta = test.convert(&mut loses_info); + let test: X87DoubleExtended = sta.value; + assert!(test.is_nan()); + assert!(!test.is_signaling()); assert!(!loses_info); + assert_eq!(sta.status, Status::INVALID_OP); let test = X87DoubleExtended::qnan(None); let test: X87DoubleExtended = test.convert(&mut loses_info).value; assert!(test.bitwise_eq(x87_qnan)); assert!(!loses_info); + + let test = X87DoubleExtended::snan(None); + let sta = test.convert(&mut loses_info); + let test: X87DoubleExtended = sta.value; + assert!(test.is_nan()); + assert!(!test.is_signaling()); + assert!(!loses_info); + assert_eq!(sta.status, Status::INVALID_OP); } #[test]