From 1a9eec30e25c551e4a0eac39e1e25816e591afd2 Mon Sep 17 00:00:00 2001
From: luojia65 <me@luojia.cc>
Date: Thu, 2 Dec 2021 17:52:13 +0800
Subject: [PATCH] Add `PAUSE` instruction to RISC-V `core::arch`

Use `#[inline]` instead of `#[inline(always)]`
---
 crates/core_arch/src/riscv/mod.rs | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/crates/core_arch/src/riscv/mod.rs b/crates/core_arch/src/riscv/mod.rs
index 495342a40d..6d8303a09d 100644
--- a/crates/core_arch/src/riscv/mod.rs
+++ b/crates/core_arch/src/riscv/mod.rs
@@ -1 +1,10 @@
 //! RISC-V intrinsics
+
+/// Generates the `PAUSE` instruction
+///
+/// The PAUSE instruction is a HINT that indicates the current hart's rate of instruction retirement
+/// should be temporarily reduced or paused. The duration of its effect must be bounded and may be zero.
+#[inline]
+pub fn pause() {
+    unsafe { asm!(".word 0x0100000F", options(nomem, nostack)) }
+}