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riscv: dts: Lichee RV: use mainline emac drivers
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@scpcom
scpcom committed Apr 25, 2022
1 parent 37261c0 commit 7f92ba2
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26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-86panel-720x720.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -1026,6 +1034,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -1035,6 +1044,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "okay";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down
26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-86panel.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -1066,6 +1074,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -1075,6 +1084,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "okay";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "okay";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down
26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-dock-480x272.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -989,6 +997,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -998,6 +1007,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
//phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "disabled";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down
26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-dock-800x480.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -989,6 +997,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -998,6 +1007,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
//phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "disabled";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down
26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-dock-mipi.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -992,6 +1000,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -1001,6 +1010,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
//phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "disabled";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down
26 changes: 26 additions & 0 deletions arch/riscv/boot/dts/sunxi/sun20i-d1-licheerv-dock.dts
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Original file line number Diff line number Diff line change
Expand Up @@ -238,6 +238,7 @@
function = "gpio_in";
};

/*
gmac_pins_a: gmac@0 {
pins = "PE0", "PE1", "PE2", "PE3",
"PE4", "PE5", "PE6", "PE7",
Expand All @@ -252,6 +253,13 @@
"PE8", "PE9";
function = "gpio_in";
};
*/

rmii_pe_pins: rmii-pe-pins@0 {
pins = "PE0", "PE1", "PE2", "PE3", "PE4",
"PE5", "PE6", "PE7", "PE8", "PE9";
function = "gmac0";
};

dmic_pins_a: dmic@0 {
/* DMIC_PIN: CLK, DATA0, DATA1, DATA2 */
Expand Down Expand Up @@ -1026,6 +1034,7 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
status = "disabled";
};

/*
&gmac0 {
phy-mode = "rmii";
use_ephy25m = <1>;
Expand All @@ -1035,6 +1044,23 @@ tvd_row*tvd_column is the total tvd channel number to be used in multichannel mo
//phy-rst = <&pio PE 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
*/

&mdio {
ext_rmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};

&emac {
pinctrl-0 = <&rmii_pe_pins>;
pinctrl-names = "default";
phy-handle = <&ext_rmii_phy>;
phy-mode = "rmii";
/*phy-supply = <&reg_vcc_3v3>;*/
status = "disabled";
};

&spi0 {
clock-frequency = <100000000>;
Expand Down

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