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Holding registers #20
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There is no builtin ordt functionality to fully handle this case - there are basically 2 options:
Prob would go with option 2 as no ext address check is required - should work as long as the 32b writes occur in known order. |
Hi, |
rdl user-defined properties are supported. see rdl_examples/issue_20_21.rdl |
Hi,
Thanks for your work on ORDT. It is very impressive and usefull tool.
I'm trying to define holding registers in RDL, and I'm not sure how to do that.
Holding registers basically keep the value written by software in a holding register until a specified update register bit is triggered, then all the holding registers make their value visible to the hardware side. For example, if I have 128 bit control bus for some analog block that I map to registers. It would be mapped to 4 32-bit holding registers that would be written by software one at a time then updated to present the full 128 bit value to the analog. The main objective is to avoid the analog seeing any unwanted intermediate values as the registers are being written.
Thanks
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