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Joe Britton edited this page Oct 10, 2023 · 18 revisions

Kasli-SOC

Design files (schematics, PCB layouts, BOMs) can be found at Kasli-SOC/releases.

  • M-Labs port of ARTIQ to Kasli-SOC (link)
  • Tips on compiling and flashing Kasli-SOC (link)

Overview

Kasli-SOC is an ARTIQ core device for EEM peripherals. It provides a superset of the features of Kasli v2 with the following notable differences. Board features:

  • FPGA is a Xilinx XC7Z030 SoC
  • RJ45 10/100/1000T Ethernet -- this is the default network interface for master (Kasli defaults to SFP0)
  • USB 2.0 connector (PS UART, PL UART, JTAG)
  • FLASH memory is located on a removable micro-SD card
  • Two DIP switches toggle between booting from FLASH vs JTAG over USB

Comparison with Kasli v2

Kasli v2 Kasli-SOC
Chipset XC7A100T Zynq XC7Z030
7 Series PL Equivalent Atrix 7 Kintex 7
Logic Cells 101,440 125,000
total block ram 4.86 Mb 9.3Mb
DSP slices 240 400
uP 0 2 (*)

(*) Kasli-SOC has two hard-core microprocessors: ARM Cortex-A9 MPCore up to 1 GHz with NEON SIMD Engine and single+double FPU.

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