-
Notifications
You must be signed in to change notification settings - Fork 7
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
significant harmonic content observed from emitted signal (AD9910) #64
Comments
Urukul was designed for aplications that do not require low harmonic content. It seems you are the first person who needs better performance. |
If there is sufficient interest, we can make a low THD version of Urukul. |
The harmonics were and are well known. The system was designed like this and is behaving accordingly. To get low harmonics, go to low powers, remove the amplifier and potentially the other components (balun, switch, attenuator, pad) in the chain, lower the DAC bias, and also just filter the output. |
I understand, thank you for your quick and detailed responses. We will try the suggestion of bypassing the board amplifier and take another look at our system design. |
We are observing significant harmonic distortion in signals emitted from our Urukul/AD9910 board.
The distortion can be up to -20 dB relative to the fundamental frequency, which is unacceptable for my lab's applications.
The distortion occurs on every port, for a wide range of frequencies, and is not adequately suppressed by:
Our system is clocked by a Kasli card as part of an integrated system delivered by a vendor, and our measurements are performed with multiple signal analyzers that terminate with a 50 ohm load.
Please see the plot below for an example of the harmonic content we are observing:
I have several questions concerning this distortion:
:
We believe the harmonic content indicates that a component in the board is being saturated.
Our experiments show non-linear (but inadequate) suppression of the harmonic peaks using 'software' attenuation and auxiliary DAC register values, suggesting that the saturated component is downstream of both components.
From our initial investigation, it looks like the ERA-3SM+ amplifier at the end of the circuit may be being saturated.
Our calculation of the expected signal power at that amplifier is about an order of magnitude greater than the expected value indicated by a note in the Urukul drawings:
The difference is due to an order of magnitude greater power being emitted from the DDS chip, which agrees with our measurement of the signal power.
Additionally, the greater signal power we believe that the amplifier is experiencing does agree with the saturated power range listed in the ERA-3SM+ amplifier specifications.
I appreciate any insight you have into this problem!
Thank you!
The text was updated successfully, but these errors were encountered: