From a2e13796002cef8f89c45404367f8bacb368d9bb Mon Sep 17 00:00:00 2001 From: Richard Dymond Date: Tue, 11 Jun 2024 17:30:05 -0300 Subject: [PATCH] Enable sna2skool.py to disassemble IM 0/1/2 variants --- skoolkit/disassembler.py | 6 ++++++ sphinx/source/commands.rst | 1 + tests/test_disassembler.py | 9 +++++++++ tests/test_snaskool.py | 10 ++++++++-- 4 files changed, 24 insertions(+), 2 deletions(-) diff --git a/skoolkit/disassembler.py b/skoolkit/disassembler.py index 62a3bcbf..8492ca91 100644 --- a/skoolkit/disassembler.py +++ b/skoolkit/disassembler.py @@ -138,6 +138,12 @@ def __init__(self, snapshot, config): self.after_ED[0x70] = (self.no_arg, 'IN F,(C)') elif opcode == 'ED71': self.after_ED[0x71] = (self.no_arg, 'OUT (C),0') + elif opcode == 'IM': + self.after_ED[0x4E] = (self.no_arg, 'IM 0') + self.after_ED[0x66] = (self.no_arg, 'IM 0') + self.after_ED[0x6E] = (self.no_arg, 'IM 0') + self.after_ED[0x76] = (self.no_arg, 'IM 1') + self.after_ED[0x7E] = (self.no_arg, 'IM 2') elif opcode == 'NEG': for i in range(0x4C, 0x7D, 8): self.after_ED[i] = (self.no_arg, 'NEG') diff --git a/sphinx/source/commands.rst b/sphinx/source/commands.rst index 1d45fd50..63586b40 100644 --- a/sphinx/source/commands.rst +++ b/sphinx/source/commands.rst @@ -1148,6 +1148,7 @@ values: * ``ED70`` - IN F,(C) * ``ED71`` - OUT (C),0 +* ``IM`` - IM 0/1/2 variants (ED followed by 4E/66/6E/76/7E) * ``NEG`` - NEG variants (ED followed by 4C/54/5C/64/6C/74/7C) * ``RETN`` - RETN variants (ED followed by 55/5D/65/6D/75/7D) * ``XYCB`` - undocumented instructions with DDCB or FDCB opcode prefixes diff --git a/tests/test_disassembler.py b/tests/test_disassembler.py index b9628e3d..1885653c 100644 --- a/tests/test_disassembler.py +++ b/tests/test_disassembler.py @@ -2354,6 +2354,15 @@ def test_additional_opcodes_ed(self): self.assertEqual(len(instructions), 1) self.assertEqual(instructions[0][1], op) + def test_additional_opcodes_im(self): + snapshot = [0xED, 0, 0, 0] + disassembler = self._get_disassembler(snapshot, opcodes='IM') + for opcode, mode in ((0x4E, 0), (0x66, 0), (0x6E, 0), (0x76, 1), (0x7E, 2)): + snapshot[1] = opcode + instructions = disassembler.disassemble(0, 2, 'n') + self.assertEqual(len(instructions), 1) + self.assertEqual(instructions[0][1], f'IM {mode}') + def test_additional_opcodes_neg(self): snapshot = [0xED, 0, 0, 0] disassembler = self._get_disassembler(snapshot, opcodes='NEG') diff --git a/tests/test_snaskool.py b/tests/test_snaskool.py index 2d1cfabb..48ab8b5b 100644 --- a/tests/test_snaskool.py +++ b/tests/test_snaskool.py @@ -3422,10 +3422,13 @@ def test_opcodes(self): 0xFD, 0xCB, 0x00, 0xFF, # SET 7,(IY+0),A 0xED, 0x54, # NEG 0xED, 0x55, # RETN + 0xED, 0x6E, # IM 0 + 0xED, 0x76, # IM 1 + 0xED, 0x7E, # IM 2 ] ctl = """ c 00000 - i 00016 + i 00022 """ exp_skool = """ ; Routine at 0 @@ -3435,8 +3438,11 @@ def test_opcodes(self): 00008 SET 7,(IY+0),A ; 00012 NEG ; 00014 RETN ; + 00016 IM 0 ; + 00018 IM 1 ; + 00020 IM 2 ; """ - self._test_write_skool(snapshot, ctl, exp_skool, params={'Opcodes': 'ED70,ED71,NEG,RETN,XYCB'}) + self._test_write_skool(snapshot, ctl, exp_skool, params={'Opcodes': 'ED70,ED71,IM,NEG,RETN,XYCB'}) def test_semicolons_bcgi(self): snapshot = [0, 201, 0, 0, 0, 65, 0, 0, 0]