From 2a029c4129196e4b6ecde43094e5e50d57c27f0d Mon Sep 17 00:00:00 2001 From: Philipp Fensch Date: Thu, 21 Sep 2023 13:35:19 +0200 Subject: [PATCH] Changed default solver to KLU with factorization path. Removed explicit solver configuration in circuit notebooks Signed-off-by: Philipp Fensch --- dpsim/include/dpsim/MNASolverFactory.h | 6 +++--- .../Compare_DP_SMIB_ReducedOrderSG_VBR_PCM_LoadStep.ipynb | 1 - .../Notebooks/Circuits/DP_SP_SynGenTrStab_3Bus_Fault.ipynb | 2 -- .../Notebooks/Circuits/DP_SP_SynGenTrStab_SMIB_Fault.ipynb | 2 -- ..._Validation_ReducedOrderSG_VBR_SMIB_Fault_withPSAT.ipynb | 1 - 5 files changed, 3 insertions(+), 9 deletions(-) diff --git a/dpsim/include/dpsim/MNASolverFactory.h b/dpsim/include/dpsim/MNASolverFactory.h index 3c381eebd5..58698853a6 100644 --- a/dpsim/include/dpsim/MNASolverFactory.h +++ b/dpsim/include/dpsim/MNASolverFactory.h @@ -64,12 +64,12 @@ class MnaSolverFactory { static std::shared_ptr> factory(String name, CPS::Domain domain = CPS::Domain::DP, CPS::Logger::Level logLevel = CPS::Logger::Level::info, - DirectLinearSolverImpl implementation = DirectLinearSolverImpl::SparseLU, + DirectLinearSolverImpl implementation = DirectLinearSolverImpl::KLU, String pluginName = "plugin.so") { - //To avoid regression we use SparseLU in case of undefined implementation + //To avoid regression we use KLU in case of undefined implementation if (implementation == DirectLinearSolverImpl::Undef) { - implementation = DirectLinearSolverImpl::SparseLU; + implementation = DirectLinearSolverImpl::KLU; } CPS::Logger::Log log = CPS::Logger::get("MnaSolverFactory", CPS::Logger::Level::info, CPS::Logger::Level::info); diff --git a/examples/Notebooks/Circuits/Compare_DP_SMIB_ReducedOrderSG_VBR_PCM_LoadStep.ipynb b/examples/Notebooks/Circuits/Compare_DP_SMIB_ReducedOrderSG_VBR_PCM_LoadStep.ipynb index 6688624907..3ba502fa32 100644 --- a/examples/Notebooks/Circuits/Compare_DP_SMIB_ReducedOrderSG_VBR_PCM_LoadStep.ipynb +++ b/examples/Notebooks/Circuits/Compare_DP_SMIB_ReducedOrderSG_VBR_PCM_LoadStep.ipynb @@ -304,7 +304,6 @@ " sim.set_system(system)\n", " sim.do_init_from_nodes_and_terminals(True)\n", " sim.set_domain(dpsimpy.Domain.DP)\n", - " sim.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", " sim.set_time_step(time_step)\n", " sim.set_final_time(final_time)\n", " if (gen_model==\"4VBR\" or gen_model==\"6VBR\"):\n", diff --git a/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_3Bus_Fault.ipynb b/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_3Bus_Fault.ipynb index a4aae2ed07..4d0d9d3b1d 100644 --- a/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_3Bus_Fault.ipynb +++ b/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_3Bus_Fault.ipynb @@ -338,7 +338,6 @@ "sim_dp.set_domain(dpsimpy.Domain.DP)\n", "sim_dp.add_logger(logger_dp)\n", "sim_dp.do_system_matrix_recomputation(True)\n", - "sim_dp.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", "\n", "\n", "# Events\n", @@ -660,7 +659,6 @@ "sim_sp.set_domain(dpsimpy.Domain.SP)\n", "sim_sp.add_logger(logger_sp)\n", "sim_sp.do_system_matrix_recomputation(True)\n", - "sim_sp.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", "\n", "\n", "# Events\n", diff --git a/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_SMIB_Fault.ipynb b/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_SMIB_Fault.ipynb index 2b6dd3b650..8bd6b7012b 100644 --- a/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_SMIB_Fault.ipynb +++ b/examples/Notebooks/Circuits/DP_SP_SynGenTrStab_SMIB_Fault.ipynb @@ -243,7 +243,6 @@ "sim_dp.set_domain(dpsimpy.Domain.DP)\n", "sim_dp.add_logger(logger_dp)\n", "sim_dp.do_system_matrix_recomputation(True)\n", - "sim_dp.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", "\n", "\n", "# Events\n", @@ -477,7 +476,6 @@ "sim_sp.set_domain(dpsimpy.Domain.SP)\n", "sim_sp.add_logger(logger_sp)\n", "sim_sp.do_system_matrix_recomputation(True)\n", - "sim_sp.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", "\n", "\n", "# Events\n", diff --git a/examples/Notebooks/Circuits/SP_Validation_ReducedOrderSG_VBR_SMIB_Fault_withPSAT.ipynb b/examples/Notebooks/Circuits/SP_Validation_ReducedOrderSG_VBR_SMIB_Fault_withPSAT.ipynb index 47aeaa2a60..ff0fe7a733 100644 --- a/examples/Notebooks/Circuits/SP_Validation_ReducedOrderSG_VBR_SMIB_Fault_withPSAT.ipynb +++ b/examples/Notebooks/Circuits/SP_Validation_ReducedOrderSG_VBR_SMIB_Fault_withPSAT.ipynb @@ -612,7 +612,6 @@ " sim.set_system(system)\n", " sim.do_init_from_nodes_and_terminals(True)\n", " sim.set_domain(dpsimpy.Domain.SP)\n", - " sim.set_direct_solver_implementation(dpsimpy.DirectLinearSolverImpl.SparseLU)\n", " sim.set_time_step(time_step)\n", " sim.set_final_time(final_time)\n", " sim.do_system_matrix_recomputation(True)\n",