From 69d09c9250234cdfedbe5fd3aa108789ab92341d Mon Sep 17 00:00:00 2001 From: Marvin Tollnitsch Date: Sat, 28 Sep 2024 18:37:55 +0200 Subject: [PATCH] Add test circuits for newly implemented three-phase SSN models of inductor, capacitor and serial RLC circuit + add "EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp" which contains a linear circuit implemented using resistive companion component models in one simulation and the new SSN component models in another simulation for comparison + add "EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp" which contains a linear RLC circuit implemented using resistive compantion component models in one simulation and the new SSN component model in another simulation for comparison + add "EMT_Ph3_compare_RC_SSN.ipynb". This notebook simulates the circuits in the files mentioned above to show, compare and assert the results (SSN against RC) * adjust "dpsim/examples/cxx/CMakeLists.txt" to include "EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp" and "EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp" Signed-off-by: Marvin Tollnitsch --- dpsim/examples/cxx/CMakeLists.txt | 4 + .../Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp | 143 ++++++++++ .../Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp | 114 ++++++++ .../Circuits/EMT_Ph3_compare_RC_SSN.ipynb | 245 ++++++++++++++++++ 4 files changed, 506 insertions(+) create mode 100644 dpsim/examples/cxx/Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp create mode 100644 dpsim/examples/cxx/Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp create mode 100644 examples/Notebooks/Circuits/EMT_Ph3_compare_RC_SSN.ipynb diff --git a/dpsim/examples/cxx/CMakeLists.txt b/dpsim/examples/cxx/CMakeLists.txt index dba9ec1117..5f2b5d55d8 100644 --- a/dpsim/examples/cxx/CMakeLists.txt +++ b/dpsim/examples/cxx/CMakeLists.txt @@ -33,6 +33,8 @@ set(CIRCUIT_SOURCES #Circuits/EMT_ResVS_RL_Switch.cpp Circuits/EMT_VSI.cpp Circuits/EMT_PiLine.cpp + Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp + Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp # EMT examples with PF initialization Circuits/EMT_Slack_PiLine_PQLoad_with_PF_Init.cpp @@ -132,6 +134,8 @@ list(APPEND TEST_SOURCES Circuits/EMT_DP_SP_Slack_PiLine_PQLoad_FrequencyRamp_CosineFM.cpp Circuits/DP_SMIB_ReducedOrderSG_LoadStep.cpp Circuits/DP_SMIB_ReducedOrderSGIterative_LoadStep.cpp + Circuits/EMT_Ph3_LinearSampleCircuit.cpp + Circuits/EMT_Ph3_LinearSampleCircuitSSN.cpp ) if(WITH_SUNDIALS) diff --git a/dpsim/examples/cxx/Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp b/dpsim/examples/cxx/Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp new file mode 100644 index 0000000000..465e9149ba --- /dev/null +++ b/dpsim/examples/cxx/Circuits/EMT_Ph3_R3C1L1CS1_RC_vs_SSN.cpp @@ -0,0 +1,143 @@ +#include + +using namespace DPsim; +using namespace CPS::EMT; + +void EMT_PH3_R3_C1_L1_CS1() { + // Define simulation scenario + Real timeStep = 0.0001; + Real finalTime = 0.1; + String simNameRC = "EMT_Ph3_R3C1L1CS1_RC_vs_SSN_RC"; + + // Nodes + auto n1 = SimNode::make("n1", PhaseType::ABC); + auto n2 = SimNode::make("n2", PhaseType::ABC); + + // Components + + Matrix param = Matrix::Zero(3, 3); + param << 1., 0, 0, 0, 1., 0, 0, 0, 1.; + + auto cs0 = Ph3::CurrentSource::make("CS0"); + cs0->setParameters( + CPS::Math::singlePhaseVariableToThreePhase(CPS::Math::polar(1.0, 0.0)), + 50.0); + + auto r1 = Ph3::Resistor::make("R1"); + r1->setParameters(10 * param); + + auto r2 = Ph3::Resistor::make("R2"); + r2->setParameters(param); + + auto r3 = Ph3::Resistor::make("R3"); + r3->setParameters(5 * param); + + auto l1 = Ph3::Inductor::make("L1"); + l1->setParameters(0.02 * param); + + auto c1 = Ph3::Capacitor::make("C1"); + c1->setParameters(0.001 * param); + + // Topology + cs0->connect(SimNode::List{n1, SimNode::GND}); + + r1->connect(SimNode::List{n2, n1}); + r2->connect(SimNode::List{n2, SimNode::GND}); + r3->connect(SimNode::List{n2, SimNode::GND}); + + l1->connect(SimNode::List{n2, SimNode::GND}); + + c1->connect(SimNode::List{n1, n2}); + + // Define system topology + auto sys = SystemTopology(50, SystemNodeList{n1, n2}, + SystemComponentList{cs0, r1, r2, r3, l1, c1}); + + // Logging + Logger::setLogDir("logs/" + simNameRC); + auto logger = DataLogger::make(simNameRC); + logger->logAttribute("V1", n1->attribute("v")); + logger->logAttribute("V2", n2->attribute("v")); + logger->logAttribute("V_C1", c1->attribute("v_intf")); + logger->logAttribute("I_L1", l1->attribute("i_intf")); + + Simulation sim(simNameRC, Logger::Level::info); + sim.setSystem(sys); + sim.addLogger(logger); + sim.setDomain(Domain::EMT); + sim.setTimeStep(timeStep); + sim.setFinalTime(finalTime); + sim.run(); +} + +void EMT_PH3_SSN_R3_C1_L1_CS1() { + // Define simulation scenario + Real timeStep = 0.0001; + Real finalTime = 0.1; + String simNameSSN = "EMT_Ph3_R3C1L1CS1_RC_vs_SSN_SSN"; + Logger::setLogDir("logs/" + simNameSSN); + + // Nodes + auto n1 = CPS::EMT::SimNode::make("n1", PhaseType::ABC); + auto n2 = CPS::EMT::SimNode::make("n2", PhaseType::ABC); + + // Components + + Matrix param = Matrix::Zero(3, 3); + param << 1., 0, 0, 0, 1., 0, 0, 0, 1.; + + auto cs0 = Ph3::CurrentSource::make("CS0"); + cs0->setParameters( + CPS::Math::singlePhaseVariableToThreePhase(CPS::Math::polar(1.0, 0.0)), + 50.0); + + auto r1 = Ph3::Resistor::make("R1", Logger::Level::debug); + r1->setParameters(10 * param); + + auto r2 = Ph3::Resistor::make("R2", Logger::Level::debug); + r2->setParameters(param); + + auto r3 = Ph3::Resistor::make("R3", Logger::Level::debug); + r3->setParameters(5 * param); + + auto l1 = Ph3::SSN::Inductor::make("L1"); + l1->setParameters(0.02 * param); + + auto c1 = Ph3::SSN::Capacitor::make("C1"); + c1->setParameters(0.001 * param); + + // Topology + cs0->connect(CPS::EMT::SimNode::List{n1, CPS::EMT::SimNode::GND}); + + r1->connect(CPS::EMT::SimNode::List{n2, n1}); + r2->connect(CPS::EMT::SimNode::List{n2, CPS::EMT::SimNode::GND}); + r3->connect(CPS::EMT::SimNode::List{n2, CPS::EMT::SimNode::GND}); + + l1->connect(CPS::EMT::SimNode::List{n2, CPS::EMT::SimNode::GND}); + + c1->connect(CPS::EMT::SimNode::List{n1, n2}); + + // Define system topology + auto sys = SystemTopology(50, SystemNodeList{n1, n2}, + SystemComponentList{cs0, r1, r2, r3, l1, c1}); + + // Logging + auto logger = DataLogger::make(simNameSSN); + logger->logAttribute("V1_SSN", n1->attribute("v")); + logger->logAttribute("V2_SSN", n2->attribute("v")); + logger->logAttribute("V_C1_SSN", c1->attribute("v_intf")); + logger->logAttribute("I_L1_SSN", l1->attribute("i_intf")); + + Simulation sim(simNameSSN, Logger::Level::info); + sim.setSystem(sys); + sim.addLogger(logger); + sim.setDomain(Domain::EMT); + sim.setTimeStep(timeStep); + sim.setFinalTime(finalTime); + sim.run(); +} + +int main(int argc, char *argv[]) { + EMT_PH3_R3_C1_L1_CS1(); + EMT_PH3_SSN_R3_C1_L1_CS1(); +} diff --git a/dpsim/examples/cxx/Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp b/dpsim/examples/cxx/Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp new file mode 100644 index 0000000000..60918fd37f --- /dev/null +++ b/dpsim/examples/cxx/Circuits/EMT_Ph3_RLC1VS1_RC_vs_SSN.cpp @@ -0,0 +1,114 @@ +#include + +using namespace DPsim; +using namespace CPS::EMT; + +void EMT_Ph3_RLC1_VS1() { + // Define simulation scenario + Real timeStep = 0.0001; + Real finalTime = 0.1; + String simNameRC = "EMT_Ph3_RLC1VS1_RC_vs_SSN_RC"; + + // Nodes + auto n1 = SimNode::make("n1", PhaseType::ABC); + auto n2 = SimNode::make("n2", PhaseType::ABC); + auto n3 = SimNode::make("n3", PhaseType::ABC); + + // Components + + Matrix param = Matrix::Zero(3, 3); + param << 1., 0, 0, 0, 1., 0, 0, 0, 1.; + + auto vs0 = Ph3::VoltageSource::make("VS0"); + vs0->setParameters( + CPS::Math::singlePhaseVariableToThreePhase(CPS::Math::polar(1.0, 0.0)), + 50.0); + + auto r1 = Ph3::Resistor::make("R1"); + r1->setParameters(1. * param); + + auto l1 = Ph3::Inductor::make("L1"); + l1->setParameters(0.05 * param); + + auto c1 = Ph3::Capacitor::make("C1"); + c1->setParameters(0.01 * param); + + // Topology + vs0->connect(SimNode::List{n1, SimNode::GND}); + + r1->connect(SimNode::List{n1, n2}); + + l1->connect(SimNode::List{n2, n3}); + + c1->connect(SimNode::List{n3, SimNode::GND}); + + // Define system topology + auto sys = SystemTopology(50, SystemNodeList{n1, n2, n3}, + SystemComponentList{vs0, r1, l1, c1}); + + // Logging + Logger::setLogDir("logs/" + simNameRC); + auto logger = DataLogger::make(simNameRC); + logger->logAttribute("I_R", r1->attribute("i_intf")); + logger->logAttribute("V1_RC", n1->attribute("v")); + + Simulation sim(simNameRC, Logger::Level::info); + sim.setSystem(sys); + sim.addLogger(logger); + sim.setDomain(Domain::EMT); + sim.setTimeStep(timeStep); + sim.setFinalTime(finalTime); + sim.run(); +} + +void EMT_Ph3_SSN_RLC1_VS1() { + // Define simulation scenario + Real timeStep = 0.0001; + Real finalTime = 0.1; + String simNameSSN = "EMT_Ph3_RLC1VS1_RC_vs_SSN_SSN"; + + // Nodes + auto n1 = CPS::EMT::SimNode::make("n1", PhaseType::ABC); + + // Components + + Matrix param = Matrix::Zero(3, 3); + param << 1., 0, 0, 0, 1., 0, 0, 0, 1.; + + auto vs0 = Ph3::VoltageSource::make("VS0"); + vs0->setParameters( + CPS::Math::singlePhaseVariableToThreePhase(CPS::Math::polar(1.0, 0.0)), + 50.0); + + auto rlc = Ph3::SSN::Full_Serial_RLC::make("RLC"); + rlc->setParameters(1. * param, 0.05 * param, 0.01 * param); + + // Topology + vs0->connect(CPS::EMT::SimNode::List{n1, CPS::EMT::SimNode::GND}); + + rlc->connect(CPS::EMT::SimNode::List{n1, CPS::EMT::SimNode::GND}); + + // Define system topology + auto sys = + SystemTopology(50, SystemNodeList{n1}, SystemComponentList{vs0, rlc}); + + // Logging + Logger::setLogDir("logs/" + simNameSSN); + auto logger = DataLogger::make(simNameSSN); + logger->logAttribute("I_RLC_SSN", rlc->attribute("i_intf")); + logger->logAttribute("V1_SSN", n1->attribute("v")); + + Simulation sim(simNameSSN, Logger::Level::info); + sim.setSystem(sys); + sim.addLogger(logger); + sim.setDomain(Domain::EMT); + sim.setSolverType(Solver::Type::MNA); + sim.setTimeStep(timeStep); + sim.setFinalTime(finalTime); + sim.run(); +} + +int main(int argc, char *argv[]) { + EMT_Ph3_RLC1_VS1(); + EMT_Ph3_SSN_RLC1_VS1(); +} diff --git a/examples/Notebooks/Circuits/EMT_Ph3_compare_RC_SSN.ipynb b/examples/Notebooks/Circuits/EMT_Ph3_compare_RC_SSN.ipynb new file mode 100644 index 0000000000..4c762e70d5 --- /dev/null +++ b/examples/Notebooks/Circuits/EMT_Ph3_compare_RC_SSN.ipynb @@ -0,0 +1,245 @@ +{ + "cells": [ + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "# Comparing RC and SSN linear circuit simulations in EMT Ph3 domain\n", + "### Comparing EMT domain simulations of Ph3 linear circuits built from Resistive Companion (RC) component models against the same linear circuits build from SSN (State Space Nodal) component models." + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## Run C++ examples: R3_C1_L1_CS1 circuit" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "import os\n", + "import subprocess\n", + "\n", + "#%matplotlib widget\n", + "\n", + "name = 'EMT_Ph3_R3C1L1CS1_RC_vs_SSN'\n", + "\n", + "dpsim_path = subprocess.Popen(['git', 'rev-parse', '--show-toplevel'], stdout=subprocess.PIPE).communicate()[0].rstrip().decode('utf-8')\n", + "\n", + "path_exec = dpsim_path + '/build/dpsim/examples/cxx/'\n", + "sim = subprocess.Popen([path_exec + name], stdout=subprocess.PIPE, stderr=subprocess.STDOUT)\n", + "print(sim.communicate()[0].decode())" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### Load Results" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "from villas.dataprocessing.readtools import *\n", + "from villas.dataprocessing.timeseries import *\n", + "from villas.dataprocessing.timeseries import TimeSeries as ts\n", + "import matplotlib.pyplot as plt\n", + "import re\n", + "import numpy as np\n", + "import math\n", + "\n", + "work_dir = os.getcwd() + \"/logs/\"\n", + "path_logfile_RC = work_dir + name + '_RC/' + name + '_RC' + '.csv'\n", + "ts_EMT_Ph3_R3C1L1CS1_RC = read_timeseries_dpsim(path_logfile_RC)\n", + "path_logfile_SSN = work_dir + name + '_SSN/' + name + '_SSN' + '.csv'\n", + "ts_EMT_Ph3_R3C1L1CS1_SSN = read_timeseries_dpsim(path_logfile_SSN)\n" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## Run C++ examples: RLC_VS circuit" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "name = 'EMT_Ph3_RLC1VS1_RC_vs_SSN'\n", + "\n", + "dpsim_path = subprocess.Popen(['git', 'rev-parse', '--show-toplevel'], stdout=subprocess.PIPE).communicate()[0].rstrip().decode('utf-8')\n", + "\n", + "path_exec = dpsim_path + '/build/dpsim/examples/cxx/'\n", + "sim = subprocess.Popen([path_exec + name], stdout=subprocess.PIPE, stderr=subprocess.STDOUT)\n", + "print(sim.communicate()[0].decode())" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "### Load Results" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "work_dir = os.getcwd() + \"/logs/\"\n", + "path_logfile_RC = work_dir + name + '_RC/' + name + '_RC' + '.csv'\n", + "ts_EMT_Ph3_RLC1VS1_RC = read_timeseries_dpsim(path_logfile_RC)\n", + "path_logfile_SSN = work_dir + name + '_SSN/' + name + '_SSN' + '.csv'\n", + "ts_EMT_Ph3_RLC1VS1_SSN = read_timeseries_dpsim(path_logfile_SSN)" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## Plot R3_C1_L1_CS1 circuit results" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "plt.close('all')\n", + "fig1 = plt.figure()\n", + "\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_0'].time, ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_0'].values, \"r-\", label='I_L1_a')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_1'].time, ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_1'].values, \"g-\", label='I_L1_b')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_2'].time, ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_2'].values, \"b-\", label='I_L1_c')\n", + "\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_0'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_0'].values, \"rx\", markevery=10, label='I_L1_SSN_a')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_1'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_1'].values, \"gx\", markevery=10, label='I_L1_SSN_b')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_2'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_2'].values, \"bx\", markevery=10, label='I_L1_SSN_c')\n", + "\n", + "plt.legend(loc = 4)\n", + "\n", + "plt.title('Comparison of resistive companion and SSN simulation: Inductor current')\n", + "plt.xlabel('t [s]')\n", + "plt.ylabel('Phase current [A]')" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "fig2 = plt.figure()\n", + "\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_0'].time, ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_0'].values, \"r-\", label='V_C1_a')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_1'].time, ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_1'].values, \"g-\", label='V_C1_b')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_2'].time, ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_2'].values, \"b-\", label='V_C1_c')\n", + "\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_0'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_0'].values, \"rx\", markevery=10, label='V_C1_SSN_a')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_1'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_1'].values, \"gx\", markevery=10, label='V_C1_SSN_b')\n", + "plt.plot(ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_2'].time, ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_2'].values, \"bx\", markevery=10, label='V_C1_SSN_c')\n", + "\n", + "plt.legend(loc = 4)\n", + "\n", + "plt.title('Comparison of resistive companion and SSN simulation: Capacitor voltage')\n", + "plt.xlabel('t [s]')\n", + "plt.ylabel('Phase voltage [V]')" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## Plot RLC_VS circuit results" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "fig3 = plt.figure()\n", + "\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_RC['I_R_0'].time, ts_EMT_Ph3_RLC1VS1_RC['I_R_0'].values, \"r-\", label='I_R_a')\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_RC['I_R_1'].time, ts_EMT_Ph3_RLC1VS1_RC['I_R_1'].values, \"g-\", label='I_R_b')\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_RC['I_R_2'].time, ts_EMT_Ph3_RLC1VS1_RC['I_R_2'].values, \"b-\", label='I_R_c')\n", + "\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_0'].time, ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_0'].values, \"rx\", markevery=10, label='I_RLC_SSN_a')\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_1'].time, ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_1'].values, \"gx\", markevery=10, label='I_RLC_SSN_b')\n", + "plt.plot(ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_2'].time, ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_2'].values, \"bx\", markevery=10, label='I_RLC_SSN_c')\n", + "\n", + "plt.legend(loc = 4)\n", + "\n", + "plt.title('Comparison of resistive companion and SSN simulation results: RLC current')\n", + "plt.xlabel('t [s]')\n", + "plt.ylabel('Phase currents [A]')" + ] + }, + { + "cell_type": "markdown", + "metadata": {}, + "source": [ + "## Assert" + ] + }, + { + "cell_type": "code", + "execution_count": null, + "metadata": {}, + "outputs": [], + "source": [ + "epsilon = 1e-100\n", + "\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_0'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_0'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_1'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_1'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['I_L1_2'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['I_L1_SSN_2'].values) < epsilon)\n", + "\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_0'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_0'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_1'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_1'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_R3C1L1CS1_RC['V_C1_2'].values-ts_EMT_Ph3_R3C1L1CS1_SSN['V_C1_SSN_2'].values) < epsilon)\n", + "\n", + "assert(np.max(ts_EMT_Ph3_RLC1VS1_RC['I_R_0'].values-ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_0'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_RLC1VS1_RC['I_R_1'].values-ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_1'].values) < epsilon)\n", + "assert(np.max(ts_EMT_Ph3_RLC1VS1_RC['I_R_2'].values-ts_EMT_Ph3_RLC1VS1_SSN['I_RLC_SSN_2'].values) < epsilon)" + ] + } + ], + "metadata": { + "kernelspec": { + "display_name": "Python 3 (ipykernel)", + "language": "python", + "name": "python3" + }, + "language_info": { + "codemirror_mode": { + "name": "ipython", + "version": 3 + }, + "file_extension": ".py", + "mimetype": "text/x-python", + "name": "python", + "nbconvert_exporter": "python", + "pygments_lexer": "ipython3", + "version": "3.9.13" + }, + "tests": { + "skip": false + } + }, + "nbformat": 4, + "nbformat_minor": 4 +}