From cc2577ff6ea8a2f8d536ea136d8583fed2d48adb Mon Sep 17 00:00:00 2001 From: Vineet Mittal Date: Fri, 15 Apr 2022 19:47:04 +0000 Subject: [PATCH] Changes to support topology and port speed agnostic switch init for TD3 based platforms --- .../Arista-7050CX3-32S-C32/td3-a7050cx3-32s-32x100G.config.bcm | 2 +- .../td3-a7050cx3-32s-48x50G+8x100G.config.bcm | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32/td3-a7050cx3-32s-32x100G.config.bcm b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32/td3-a7050cx3-32s-32x100G.config.bcm index 22088621cef1..3b37d661f403 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32/td3-a7050cx3-32s-32x100G.config.bcm +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-C32/td3-a7050cx3-32s-32x100G.config.bcm @@ -52,7 +52,7 @@ stable_size=0x5500000 tdma_timeout_usec=15000000 tslam_timeout_usec=15000000 sai_optimized_mmu=1 -mmu_init_config="TD3-MSFT-T0-100G" +mmu_init_config="TD3-MSFT-CUSTOM" buf.map.egress_pool0.ingress_pool=0 buf.map.egress_pool1.ingress_pool=0 buf.map.egress_pool2.ingress_pool=1 diff --git a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/td3-a7050cx3-32s-48x50G+8x100G.config.bcm b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/td3-a7050cx3-32s-48x50G+8x100G.config.bcm index aaad28895942..267b3bb81a9a 100644 --- a/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/td3-a7050cx3-32s-48x50G+8x100G.config.bcm +++ b/device/arista/x86_64-arista_7050cx3_32s/Arista-7050CX3-32S-D48C8/td3-a7050cx3-32s-48x50G+8x100G.config.bcm @@ -52,7 +52,7 @@ stable_size=0x5500000 tdma_timeout_usec=15000000 tslam_timeout_usec=15000000 sai_optimized_mmu=1 -mmu_init_config="TD3-MSFT-T0-50G" +mmu_init_config="TD3-MSFT-CUSTOM" buf.map.egress_pool0.ingress_pool=0 buf.map.egress_pool1.ingress_pool=0 buf.map.egress_pool2.ingress_pool=1