Should VCOM be MOD?

[msinger]

Is it possible that you labeled VCOM wrong in the timing diagrams? I think you meant MOD. In the GBA service manual, VCOM is not connected to the AGB CPU. It's not a digital signal. But MOD is missing in your diagrams, so I think you may have shifted a line lower by accident when reading your pin table. In the pin table, the note "Active on positive edge" on pin 29 (VCOM) belongs to pin 28 (MOD) I think.

[squk]

@msinger It's very possible! I don't have a digital electronics background, I almost exclusively work in software and this was my first foray into the electronics world beyond basic arduino stuff. This makes me wondder if my pin18 label is also incorrect.

A while ago I had some Verilog that was ~successfully decoding signals from a real console and converting the video to an HDMI output. That Verilog was based off the findings in this repo, but I don't doubt I could have had things mislabeled.

For my own curiosity, what're you working on that had you stumble into this repo?

[msinger]

I'm reverse engineering Game Boy stuff, mainly DMG, though. But I made the schematics of the Wide-Boy64 AGB in KiCad, and I got asked for help to figure out a problem with the AGB display signals in this discussion: msinger/wideboy#3

Because of that, I wanted to understand the signals for the AGB display. That's how I stumbled on your repository. I didn't want to solder wires to one of my AGBs to see the signals. We already solved the problem. But I ordered 40-pin connectors and flex cables on Aliexpress, so that I can experiment on the display myself. They haven't arrived yet. If I get the connectors and the cables, then I can check your labels for sure and tell you if you mixed them up.

I think you labeled pin 18 correctly. The display seems to have 16-bit colors, which is typically 5 red, 6 green and 5 blue. So it makes sense that the display has an additional green signal that is grounded, because the AGB only outputs 5 bits for green. Theoretically, the display will never be able to display absolute white when bit 0 of green is hardwired to ground, but no one will notice that.

[squk]

Thanks!

I just made the FPGA code I mentioned public if you're curious: https://github.com/squk/VSASDTC

[msinger]

Thanks, I'll take a look. But the link doesn't work. Did you really make it public?

[squk]

@msinger whoops, it should be public now!

[msinger]

I did some measurements now. My suspicion was wrong. It is indeed VCOM (pin 29) that has this alternating signal. MOD (pin 28) seems to be always high.

But there is a problem. I wouldn't connect VCOM to your logic analyzer anymore. It is not a digital signal between 0V and 3.3V like the others. On my device it alternates between -0.8V and 4V. It may still be in tolerable range for your logic analyzer, but I wouldn't risk it. I don't fully understand the schematics. It's possible that the voltage range is controlled by VR1, which I think is the contrast potentiometer, and could be different for each device.

The other supply voltages that are generated by U3 (AGB-REG) are switching with VCOM, some of them are inverted to VCOM. All of them are in a different range. The SW input (pin 3) of U3 is connected to pin 108 (REVC) of the AGB CPU. this REVC signal is a digital signal (0V-3.3V), which controls the AGB-REG chips voltage outputs. It is inverse to the VCOM voltage. So if you want to do measurements, you could solder a wire to the REVC test point instead.

This means the comment "Active on positive edge" for VCOM in your table is wrong, because VCOM is not a control signal, but a supply voltage for the display. Nothing happens at its positive edge. It is alternating, because the current flow through the display segments needs to be alternating. I haven't measured it, but it should have the same frequency that you've written for V0-V4 (6.81KHz).