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[reset] Reset and force debug for Cortex M0 targets #332
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This should be fixed in latest |
@Nightwalker-87 |
I think this should be documented before we close this issue. |
@Nightwalker-87 I added information about args to https://github.com/stlink-org/stlink/blob/develop/doc/tutorial.md |
@Ant-ON I have taken note of that, but was pointing at
on the code-layer and not on the command line level. |
@Nightwalker-87 in command line layer too. See |
Ah now I get it - reset 0, 1 & 2 sounded like enum cases in the code to me at first... That's fine then. |
As #1114, which addresses this ticket, also includes the related documentation, we can now close this issue as resolved. |
It seems that for CortexM0 targets, tested with STM32L053, memory and memory mapped registers cannot be accesed with _stlink_usb_read_debug32 unless the core is halted in debug state after a call to stlink_force_debug(sl). Resetting the core seems to start it again. This has implications for how we can identify the chip reading the cip-id registers.
For cortex M3 and M4 the memory is accessible from the debugger while the core and a program is running so this is not an issue for these cores.
Now the three programs st-util, st-flash and st-info have different behavior and therefore works and fails under different circumstances, making the situation confusing.
st-util normally halts and enters debug mode before handing control to gdb, and calls open with resetflag 0, stlink_open_usb(state.logging_level, 0); and it correctly identifies STM32L053
st-flash must enter debug mode to run RAM based flash loaders, calls open with reset flag 1, stlink_open_usb(state.logging_level, 1); and it fails to identify STM32L053
st-info calls open with reset flag 1, stlink_open_usb(state.logging_level, 1); and it fails to identify STM32L053
This is a bit of a mess and it should be cleaned up, so input is wanted, we dont want to break what is working.
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