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Merge pull request #719 from stm32-rs/gpioptr
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shorten gpio ptr access
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burrbull authored Dec 29, 2023
2 parents fd2855a + c8d30fa commit f848188
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Showing 5 changed files with 40 additions and 62 deletions.
1 change: 1 addition & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

### Changed

- shorten gpio ptr access
- bump embedded-hal to `1.0.0-rc.3`

## [v0.19.0] - 2023-12-11
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57 changes: 27 additions & 30 deletions src/gpio.rs
Original file line number Diff line number Diff line change
Expand Up @@ -321,7 +321,7 @@ where
let offset = 2 * { N };

unsafe {
(*Gpio::<P>::ptr())
(*gpiox::<P>())
.ospeedr
.modify(|r, w| w.bits((r.bits() & !(0b11 << offset)) | ((speed as u32) << offset)));
}
Expand Down Expand Up @@ -353,7 +353,7 @@ where
let offset = 2 * { N };
let value = resistor as u32;
unsafe {
(*Gpio::<P>::ptr())
(*gpiox::<P>())
.pupdr
.modify(|r, w| w.bits((r.bits() & !(0b11 << offset)) | (value << offset)));
}
Expand Down Expand Up @@ -435,22 +435,22 @@ impl<const P: char, const N: u8, MODE> Pin<P, N, MODE> {
#[inline(always)]
fn _set_high(&mut self) {
// NOTE(unsafe) atomic write to a stateless register
unsafe { (*Gpio::<P>::ptr()).bsrr.write(|w| w.bits(1 << N)) }
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(1 << N)) }
}
#[inline(always)]
fn _set_low(&mut self) {
// NOTE(unsafe) atomic write to a stateless register
unsafe { (*Gpio::<P>::ptr()).bsrr.write(|w| w.bits(1 << (16 + N))) }
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(1 << (16 + N))) }
}
#[inline(always)]
fn _is_set_low(&self) -> bool {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*Gpio::<P>::ptr()).odr.read().bits() & (1 << N) == 0 }
unsafe { (*gpiox::<P>()).odr.read().bits() & (1 << N) == 0 }
}
#[inline(always)]
fn _is_low(&self) -> bool {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*Gpio::<P>::ptr()).idr.read().bits() & (1 << N) == 0 }
unsafe { (*gpiox::<P>()).idr.read().bits() & (1 << N) == 0 }
}
}

Expand Down Expand Up @@ -603,29 +603,26 @@ use gpio;
mod f4;
pub use f4::*;

struct Gpio<const P: char>;
impl<const P: char> Gpio<P> {
const fn ptr() -> *const crate::pac::gpioa::RegisterBlock {
match P {
'A' => crate::pac::GPIOA::ptr(),
'B' => crate::pac::GPIOB::ptr() as _,
'C' => crate::pac::GPIOC::ptr() as _,
#[cfg(feature = "gpiod")]
'D' => crate::pac::GPIOD::ptr() as _,
#[cfg(feature = "gpioe")]
'E' => crate::pac::GPIOE::ptr() as _,
#[cfg(feature = "gpiof")]
'F' => crate::pac::GPIOF::ptr() as _,
#[cfg(feature = "gpiog")]
'G' => crate::pac::GPIOG::ptr() as _,
'H' => crate::pac::GPIOH::ptr() as _,
#[cfg(feature = "gpioi")]
'I' => crate::pac::GPIOI::ptr() as _,
#[cfg(feature = "gpioj")]
'J' => crate::pac::GPIOJ::ptr() as _,
#[cfg(feature = "gpiok")]
'K' => crate::pac::GPIOK::ptr() as _,
_ => panic!("Unknown GPIO port"),
}
const fn gpiox<const P: char>() -> *const crate::pac::gpioa::RegisterBlock {
match P {
'A' => crate::pac::GPIOA::ptr(),
'B' => crate::pac::GPIOB::ptr() as _,
'C' => crate::pac::GPIOC::ptr() as _,
#[cfg(feature = "gpiod")]
'D' => crate::pac::GPIOD::ptr() as _,
#[cfg(feature = "gpioe")]
'E' => crate::pac::GPIOE::ptr() as _,
#[cfg(feature = "gpiof")]
'F' => crate::pac::GPIOF::ptr() as _,
#[cfg(feature = "gpiog")]
'G' => crate::pac::GPIOG::ptr() as _,
'H' => crate::pac::GPIOH::ptr() as _,
#[cfg(feature = "gpioi")]
'I' => crate::pac::GPIOI::ptr() as _,
#[cfg(feature = "gpioj")]
'J' => crate::pac::GPIOJ::ptr() as _,
#[cfg(feature = "gpiok")]
'K' => crate::pac::GPIOK::ptr() as _,
_ => panic!("Unknown GPIO port"),
}
}
4 changes: 2 additions & 2 deletions src/gpio/convert.rs
Original file line number Diff line number Diff line change
Expand Up @@ -97,7 +97,7 @@ impl<const P: char, const N: u8, MODE: PinMode> Pin<P, N, MODE> {
/// ensure they use this properly.
#[inline(always)]
pub(super) fn mode<M: PinMode>(&mut self) {
change_mode!((*Gpio::<P>::ptr()), N);
change_mode!((*gpiox::<P>()), N);
}

#[inline(always)]
Expand Down Expand Up @@ -167,7 +167,7 @@ impl<const P: char, MODE: PinMode> PartiallyErasedPin<P, MODE> {
#[inline(always)]
pub(super) fn mode<M: PinMode>(&mut self) {
let n = self.pin_id();
change_mode!((*Gpio::<P>::ptr()), n);
change_mode!((*gpiox::<P>()), n);
}

#[inline(always)]
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28 changes: 6 additions & 22 deletions src/gpio/outport.rs
Original file line number Diff line number Diff line change
Expand Up @@ -31,29 +31,17 @@ macro_rules! out_port {
#[doc=concat!("Set/reset pins according to `", $n, "` lower bits")]
#[inline(never)]
pub fn write(&mut self, word: u32) {
unsafe {
(*Gpio::<P>::ptr())
.bsrr
.write(|w| w.bits(Self::value_for_write_bsrr(word)))
}
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(Self::value_for_write_bsrr(word))) }
}

/// Set all pins to `PinState::High`
pub fn all_high(&mut self) {
unsafe {
(*Gpio::<P>::ptr())
.bsrr
.write(|w| w.bits(Self::mask()))
}
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(Self::mask())) }
}

/// Reset all pins to `PinState::Low`
pub fn all_low(&mut self) {
unsafe {
(*Gpio::<P>::ptr())
.bsrr
.write(|w| w.bits(Self::mask() << 16))
}
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(Self::mask() << 16)) }
}
}
}
Expand Down Expand Up @@ -98,23 +86,19 @@ impl<const P: char, const SIZE: usize> OutPortArray<P, SIZE> {
#[inline(never)]
pub fn write(&mut self, word: u32) {
unsafe {
(*Gpio::<P>::ptr())
(*gpiox::<P>())
.bsrr
.write(|w| w.bits(self.value_for_write_bsrr(word)))
}
}

/// Set all pins to `PinState::High`
pub fn all_high(&mut self) {
unsafe { (*Gpio::<P>::ptr()).bsrr.write(|w| w.bits(self.mask())) }
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(self.mask())) }
}

/// Reset all pins to `PinState::Low`
pub fn all_low(&mut self) {
unsafe {
(*Gpio::<P>::ptr())
.bsrr
.write(|w| w.bits(self.mask() << 16))
}
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(self.mask() << 16)) }
}
}
12 changes: 4 additions & 8 deletions src/gpio/partially_erased.rs
Original file line number Diff line number Diff line change
Expand Up @@ -68,18 +68,14 @@ impl<const P: char, MODE> PartiallyErasedPin<P, Output<MODE>> {
#[inline(always)]
pub fn set_high(&mut self) {
// NOTE(unsafe) atomic write to a stateless register
unsafe { (*Gpio::<P>::ptr()).bsrr.write(|w| w.bits(1 << self.i)) }
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(1 << self.i)) }
}

/// Drives the pin low
#[inline(always)]
pub fn set_low(&mut self) {
// NOTE(unsafe) atomic write to a stateless register
unsafe {
(*Gpio::<P>::ptr())
.bsrr
.write(|w| w.bits(1 << (self.i + 16)))
}
unsafe { (*gpiox::<P>()).bsrr.write(|w| w.bits(1 << (self.i + 16))) }
}

/// Is the pin in drive high or low mode?
Expand Down Expand Up @@ -111,7 +107,7 @@ impl<const P: char, MODE> PartiallyErasedPin<P, Output<MODE>> {
#[inline(always)]
pub fn is_set_low(&self) -> bool {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*Gpio::<P>::ptr()).odr.read().bits() & (1 << self.i) == 0 }
unsafe { (*gpiox::<P>()).odr.read().bits() & (1 << self.i) == 0 }
}

/// Toggle pin output
Expand Down Expand Up @@ -139,7 +135,7 @@ where
#[inline(always)]
pub fn is_low(&self) -> bool {
// NOTE(unsafe) atomic read with no side effects
unsafe { (*Gpio::<P>::ptr()).idr.read().bits() & (1 << self.i) == 0 }
unsafe { (*gpiox::<P>()).idr.read().bits() & (1 << self.i) == 0 }
}
}

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