From 3871dc8dc6d4f1d770439d99635d6da02aa4200a Mon Sep 17 00:00:00 2001 From: stnolting <22944758+stnolting@users.noreply.github.com> Date: Sat, 6 Jan 2024 17:28:41 +0100 Subject: [PATCH] [sw] update example programs --- sw/example/demo_dma/main.c | 7 ++++--- sw/example/demo_gptmr/main.c | 12 ++++++------ sw/example/processor_check/main.c | 15 ++++++++++----- 3 files changed, 20 insertions(+), 14 deletions(-) diff --git a/sw/example/demo_dma/main.c b/sw/example/demo_dma/main.c index 57a036cab..a8f8b017d 100644 --- a/sw/example/demo_dma/main.c +++ b/sw/example/demo_dma/main.c @@ -3,7 +3,7 @@ // # ********************************************************************************************* # // # BSD 3-Clause License # // # # -// # Copyright (c) 2023, Stephan Nolting. All rights reserved. # +// # Copyright (c) 2024, Stephan Nolting. All rights reserved. # // # # // # Redistribution and use in source and binary forms, with or without modification, are # // # permitted provided that the following conditions are met: # @@ -223,8 +223,8 @@ int main() { // configure GPTMR neorv32_gptmr_setup(CLK_PRSC_2, // GPTM clock = 1/2 main clock - 0, // single-shot mode - 2000); // counter to threshold for triggering IRQ + 4096, // counter threshold for triggering IRQ + 1); // enable timer-match interrupt // configure transfer type cmd = DMA_CMD_B2B | // read source in byte quantities, write destination in byte quantities @@ -283,5 +283,6 @@ void show_arrays(void) { void dma_firq_handler(void) { neorv32_cpu_csr_clr(CSR_MIP, 1 << DMA_FIRQ_PENDING); // clear/ack pending FIRQ + neorv32_gptmr_disable(); // disable GPTMR neorv32_uart0_printf("<>\n"); } diff --git a/sw/example/demo_gptmr/main.c b/sw/example/demo_gptmr/main.c index b9437ac41..8c617f0de 100644 --- a/sw/example/demo_gptmr/main.c +++ b/sw/example/demo_gptmr/main.c @@ -3,7 +3,7 @@ // # ********************************************************************************************* # // # BSD 3-Clause License # // # # -// # Copyright (c) 2023, Stephan Nolting. All rights reserved. # +// # Copyright (c) 2024, Stephan Nolting. All rights reserved. # // # # // # Redistribution and use in source and binary forms, with or without modification, are # // # permitted provided that the following conditions are met: # @@ -36,7 +36,7 @@ /**********************************************************************//** * @file demo_gptmr/main.c * @author Stephan Nolting - * @brief Simple GPTMR usage example. + * @brief Simple GPTMR timer-match interrupt example. **************************************************************************/ #include @@ -63,7 +63,7 @@ void gptmr_firq_handler(void); * @return Should not return; **************************************************************************/ int main() { - + // setup NEORV32 runtime environment (for trap handling) neorv32_rte_setup(); @@ -79,7 +79,7 @@ int main() { // Intro neorv32_uart0_puts("General purpose timer (GPTMR) demo Program.\n" - "Toggles GPIO.output(0) at 1Hz using the GPTMR interrupt.\n\n"); + "Toggles GPIO.output(0) at 1Hz using the GPTMR timer-match interrupt.\n\n"); // clear GPIO output port @@ -89,8 +89,8 @@ int main() { // install GPTMR interrupt handler neorv32_rte_handler_install(GPTMR_RTE_ID, gptmr_firq_handler); - // configure timer for 1Hz ticks in continuous mode (with clock divisor = 8) - neorv32_gptmr_setup(CLK_PRSC_8, 1, NEORV32_SYSINFO->CLK / (8 * 2)); + // configure timer for 1Hz ticks with clock divisor = 8 and enable timer-match interrupt + neorv32_gptmr_setup(CLK_PRSC_8, NEORV32_SYSINFO->CLK / (8 * 2), 1); // enable interrupt neorv32_cpu_csr_clr(CSR_MIP, 1 << GPTMR_FIRQ_PENDING); // make sure there is no GPTMR IRQ pending already diff --git a/sw/example/processor_check/main.c b/sw/example/processor_check/main.c index 3fec423c8..d6a5cd721 100644 --- a/sw/example/processor_check/main.c +++ b/sw/example/processor_check/main.c @@ -3,7 +3,7 @@ // # ********************************************************************************************* # // # BSD 3-Clause License # // # # -// # Copyright (c) 2023, Stephan Nolting. All rights reserved. # +// # Copyright (c) 2024, Stephan Nolting. All rights reserved. # // # # // # Redistribution and use in source and binary forms, with or without modification, are # // # permitted provided that the following conditions are met: # @@ -1555,8 +1555,8 @@ int main() { // enable GPTMR FIRQ neorv32_cpu_irq_enable(GPTMR_FIRQ_ENABLE); - // configure timer IRQ for one-shot mode after CLK_PRSC_2*2=4 clock cycles - neorv32_gptmr_setup(CLK_PRSC_2, 0, 2); + // match-interrupt after CLK_PRSC_2*THRESHOLD = 2*2 = 8 clock cycles + neorv32_gptmr_setup(CLK_PRSC_2, 2, 1); // wait for interrupt asm volatile ("nop"); @@ -1564,13 +1564,18 @@ int main() { neorv32_cpu_csr_write(CSR_MIE, 0); - // check if IRQ - if (neorv32_cpu_csr_read(CSR_MCAUSE) == GPTMR_TRAP_CODE) { + if ((neorv32_cpu_csr_read(CSR_MCAUSE) == GPTMR_TRAP_CODE) && // correct interrupt? + (neorv32_gptmr_trigger_matched() == 1) && // IRQ caused by timer match? + (neorv32_gptmr_trigger_captured() == 0)) { // no capture trigger? test_ok(); } else { test_fail(); } + + // disable GPTMR + neorv32_gptmr_disable(); + } else { PRINT_STANDARD("[n.a.]\n");