diff --git a/CHANGELOG.md b/CHANGELOG.md index 6eaf45227..74a3232ae 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -31,6 +31,7 @@ mimpid = 0x01040312 => Version 01.04.03.12 => v1.4.3.12 | Date (*dd.mm.yyyy*) | Version | Comment | |:-------------------:|:-------:|:--------| +| 23.02.2023 | [**:rocket:1.8.1**](https://github.com/stnolting/neorv32/releases/tag/v1.8.1) | **New release** | | 22.02.2023 | 1.8.0.10 | :warning: **remove stream link interface (SLINK)**; [#502](https://github.com/stnolting/neorv32/pull/502) | | 19.02.2023 | 1.8.0.9 | :warning: constrain number of **PWM** channels to 12 (was 60); change base address of PWM module; [#501](https://github.com/stnolting/neorv32/pull/501) | | 18.02.2023 | 1.8.0.8 | :bug: fix minor bug in CPU's co-processor monitor; minor VHDL clean-ups and edits; [#500](https://github.com/stnolting/neorv32/pull/500) | diff --git a/docs/attrs.adoc b/docs/attrs.adoc index c349234df..66c839f26 100644 --- a/docs/attrs.adoc +++ b/docs/attrs.adoc @@ -1,7 +1,7 @@ :author: Stephan Nolting (M.Sc.) :keywords: neorv32, risc-v, riscv, rv32, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb :description: A size-optimized, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. -:revnumber: v1.8.0 +:revnumber: v1.8.1 :doctype: book :sectnums: :stem: diff --git a/rtl/core/neorv32_package.vhd b/rtl/core/neorv32_package.vhd index 399637afa..63cd743e1 100644 --- a/rtl/core/neorv32_package.vhd +++ b/rtl/core/neorv32_package.vhd @@ -65,7 +65,7 @@ package neorv32_package is -- Architecture Constants (do not modify!) ------------------------------------------------ -- ------------------------------------------------------------------------------------------- - constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01080010"; -- NEORV32 version + constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01080100"; -- NEORV32 version constant archid_c : natural := 19; -- official RISC-V architecture ID -- Check if we're inside the Matrix -------------------------------------------------------