diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td index 92d3bdea37edf9..5368214329a806 100644 --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -1427,7 +1427,11 @@ def int_ppc_tsuspend : GCCBuiltin<"__builtin_tsuspend">, def int_ppc_ttest : GCCBuiltin<"__builtin_ttest">, Intrinsic<[llvm_i64_ty], [], []>; -def int_ppc_cfence : Intrinsic<[], [llvm_anyint_ty], []>; +// We currently use llvm.ppc.cfence in the context of atomic load which +// in LLVM IR requires its type to be one of integer, pointer and +// float point type. So llvm_any_ty here refers to type mentioned above. +// Backend is supposed to lower these types to appropriate MVTs. +def int_ppc_cfence : Intrinsic<[], [llvm_any_ty], []>; // PowerPC set FPSCR Intrinsic Definitions. def int_ppc_setrnd : GCCBuiltin<"__builtin_setrnd">, diff --git a/llvm/test/CodeGen/PowerPC/issue55983.ll b/llvm/test/CodeGen/PowerPC/issue55983.ll new file mode 100644 index 00000000000000..7ebde001ada7f4 --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/issue55983.ll @@ -0,0 +1,66 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -opaque-pointers -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s +; RUN: llc -opaque-pointers -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s + +define void @foo() #0 { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: # %bb0 +; CHECK-NEXT: bc 12, 20, .LBB0_2 +; CHECK-NEXT: # %bb.1: # %bb1 +; CHECK-NEXT: ld 3, 0(3) +; CHECK-NEXT: cmpd 7, 3, 3 +; CHECK-NEXT: bne- 7, .+4 +; CHECK-NEXT: isync +; CHECK-NEXT: .LBB0_2: # %bb2 +bb0: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = load atomic {}*, {}** undef acquire, align 8 + unreachable + +bb2: + unreachable +} + +define void @bar() #0 { +; CHECK-LABEL: bar: +; CHECK: # %bb.0: # %bb0 +; CHECK-NEXT: bc 12, 20, .LBB1_2 +; CHECK-NEXT: # %bb.1: # %bb1 +; CHECK-NEXT: ld 3, 0(3) +; CHECK-NEXT: cmpd 7, 3, 3 +; CHECK-NEXT: bne- 7, .+4 +; CHECK-NEXT: isync +; CHECK-NEXT: .LBB1_2: # %bb2 +bb0: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = load atomic ptr, ptr undef acquire, align 8 + unreachable + +bb2: + unreachable +} + +define void @foobar() { +; CHECK-LABEL: foobar: +; CHECK: # %bb.0: # %top +; CHECK-NEXT: bc 4, 20, .LBB2_2 +; CHECK-NEXT: # %bb.1: # %err86 +; CHECK-NEXT: .LBB2_2: # %pass9 +; CHECK-NEXT: ld 3, 0(3) +; CHECK-NEXT: cmpd 7, 3, 3 +; CHECK-NEXT: bne- 7, .+4 +; CHECK-NEXT: isync +top: + br i1 undef, label %err86, label %pass9 + +pass9: ; preds = %top + %0 = load atomic {} addrspace(10)*, {} addrspace(10)* addrspace(11)* undef acquire, align 8 + unreachable + +err86: ; preds = %top + unreachable +} diff --git a/llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll b/llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll new file mode 100644 index 00000000000000..50f222a2b7431d --- /dev/null +++ b/llvm/test/Transforms/AtomicExpand/PowerPC/issue55983.ll @@ -0,0 +1,71 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -opaque-pointers -atomic-expand -S -mtriple=powerpc64le-unknown-unknown \ +; RUN: %s | FileCheck %s +; RUN: opt -opaque-pointers -atomic-expand -S -mtriple=powerpc64-unknown-unknown \ +; RUN: %s | FileCheck %s + +define void @foo() #0 { +; CHECK-LABEL: @foo( +; CHECK-NEXT: bb0: +; CHECK-NEXT: br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]] +; CHECK: bb1: +; CHECK-NEXT: [[TMP0:%.*]] = load atomic ptr, ptr undef monotonic, align 8 +; CHECK-NEXT: call void @llvm.ppc.cfence.p0(ptr [[TMP0]]) +; CHECK-NEXT: unreachable +; CHECK: bb2: +; CHECK-NEXT: unreachable +; +bb0: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = load atomic {}*, {}** undef acquire, align 8 + unreachable + +bb2: + unreachable +} + +define void @bar() #0 { +; CHECK-LABEL: @bar( +; CHECK-NEXT: bb0: +; CHECK-NEXT: br i1 undef, label [[BB1:%.*]], label [[BB2:%.*]] +; CHECK: bb1: +; CHECK-NEXT: [[TMP0:%.*]] = load atomic ptr, ptr undef monotonic, align 8 +; CHECK-NEXT: call void @llvm.ppc.cfence.p0(ptr [[TMP0]]) +; CHECK-NEXT: unreachable +; CHECK: bb2: +; CHECK-NEXT: unreachable +; +bb0: + br i1 undef, label %bb1, label %bb2 + +bb1: + %0 = load atomic ptr, ptr undef acquire, align 8 + unreachable + +bb2: + unreachable +} + +define void @foobar() { +; CHECK-LABEL: @foobar( +; CHECK-NEXT: top: +; CHECK-NEXT: br i1 undef, label [[ERR86:%.*]], label [[PASS9:%.*]] +; CHECK: pass9: +; CHECK-NEXT: [[TMP0:%.*]] = load atomic ptr addrspace(10), ptr addrspace(11) undef monotonic, align 8 +; CHECK-NEXT: call void @llvm.ppc.cfence.p10(ptr addrspace(10) [[TMP0]]) +; CHECK-NEXT: unreachable +; CHECK: err86: +; CHECK-NEXT: unreachable +; +top: + br i1 undef, label %err86, label %pass9 + +pass9: ; preds = %top + %0 = load atomic {} addrspace(10)*, {} addrspace(10)* addrspace(11)* undef acquire, align 8 + unreachable + +err86: ; preds = %top + unreachable +}