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c03.dts
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c03.dts
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/dts-v1/;
/memreserve/ 0x0000000080000000 0x0000000000010000;
/ {
compatible = "nvidia,quill", "nvidia,tegra186";
interrupt-parent = <0x1>;
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "quill";
nvidia,dtsfilename = "/usr/mg/27.1/Linux_for_Tegra_tx2/sources/kernel_source/kernel-4.4/arch/arm64/boot/dts/../../../../../../hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-tx2-cti-base.dts";
nvidia,boardids = "3310:0000:A0";
nvidia,proc-boardid = "3310:0000:A0";
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
status = "disabled";
a57_core_power_states {
compatible = "nvidia,tegra186-cpuidle-a57";
c1 {
compatible = "nvidia,tegra186-cpuidle-a57";
state-name = "Clock gated";
wakeup-latency-us = <0x1>;
min-residency-us = <0x1>;
power = <0x46>;
pmstate = <0x1>;
status = "okay";
};
c7 {
compatible = "nvidia,tegra186-cpuidle-a57";
state-name = "Core powergate";
wakeup-latency-us = <0x82>;
min-residency-us = <0xffffffff>;
power = <0x3c>;
pmstate = <0x7>;
arm,psci-suspend-param = <0x40000007>;
status = "okay";
linux,phandle = <0x5>;
phandle = <0x5>;
};
};
a57_cluster_power_states {
compatible = "nvidia,tegra186-cpuidle-a57-cluster";
cc1 {
state-name = "Cluster clock gated";
wakeup-latency-us = <0x1>;
min-residency-us = <0x1>;
power = <0x41>;
pmstate = <0x1>;
status = "okay";
};
cc6 {
state-name = "Cluster powergate";
wakeup-latency-us = <0x15e>;
min-residency-us = <0x1388>;
power = <0x13>;
pmstate = <0x6>;
status = "okay";
};
cc7 {
state-name = "Cluster railgate";
wakeup-latency-us = <0x50>;
min-residency-us = <0x320>;
power = <0x5>;
pmstate = <0x7>;
status = "disabled";
};
};
a57_crossover_thresholds {
compatible = "nvidia,tegra186-cpuidle-a57-thresholds";
thresholds {
crossover_cc1_cc6 = <0x1388>;
crossover_cc1_cc7 = <0x2bc>;
};
};
denver_core_power_states {
compatible = "nvidia,tegra186-cpuidle-denver";
c1 {
compatible = "nvidia,tegra186-cpuidle-denver";
state-name = "Clock gated";
wakeup-latency-us = <0x1>;
min-residency-us = <0x1>;
power = <0x46>;
pmstate = <0x1>;
status = "okay";
};
c6 {
compatible = "nvidia,tegra186-cpuidle-denver";
state-name = "Virtual core powergate";
wakeup-latency-us = <0xbe>;
min-residency-us = <0xffffffff>;
power = <0x3c>;
pmstate = <0x6>;
arm,psci-suspend-param = <0x6>;
status = "okay";
linux,phandle = <0x2>;
phandle = <0x2>;
};
c7 {
compatible = "nvidia,tegra186-cpuidle-denver";
state-name = "Core powergate";
wakeup-latency-us = <0x230>;
min-residency-us = <0xffffffff>;
power = <0x3c>;
pmstate = <0x7>;
arm,psci-suspend-param = <0x40000007>;
status = "okay";
linux,phandle = <0x3>;
phandle = <0x3>;
};
};
denver_cluster_power_states {
compatible = "nvidia,tegra186-cpuidle-denver-cluster";
cc1 {
state-name = "Cluster clock gated";
wakeup-latency-us = <0x1>;
min-residency-us = <0x1>;
power = <0x41>;
pmstate = <0x1>;
status = "okay";
};
cc6 {
state-name = "Cluster powergate";
wakeup-latency-us = <0x1c2>;
min-residency-us = <0x1388>;
power = <0x13>;
pmstate = <0x6>;
status = "okay";
};
cc7 {
state-name = "Cluster railgate";
wakeup-latency-us = <0x50>;
min-residency-us = <0x320>;
power = <0x5>;
pmstate = <0x7>;
status = "disabled";
};
};
denver_crossover_thresholds {
compatible = "nvidia,tegra186-cpuidle-denver-thresholds";
thresholds {
crossover_c1_c6 = <0x3e8>;
crossover_cc1_cc6 = <0x1388>;
crossover_cc1_cc7 = <0x4e20>;
};
};
cpu@0 {
device_type = "cpu";
compatible = "nvidia,denver", "arm,armv8";
reg = <0x0 0x0>;
enable-method = "psci";
cpu-idle-states = <0x2 0x3>;
cpu-ipc = <0x400>;
next-level-cache = <0x4>;
status = "okay";
linux,phandle = <0x7>;
phandle = <0x7>;
};
cpu@1 {
device_type = "cpu";
compatible = "nvidia,denver", "arm,armv8";
reg = <0x0 0x1>;
enable-method = "psci";
cpu-idle-states = <0x2 0x3>;
cpu-ipc = <0x400>;
next-level-cache = <0x4>;
status = "okay";
linux,phandle = <0x8>;
phandle = <0x8>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a57-64bit", "arm,armv8";
reg = <0x0 0x100>;
enable-method = "psci";
cpu-idle-states = <0x5>;
cpu-ipc = <0x2f0>;
next-level-cache = <0x6>;
status = "okay";
linux,phandle = <0x9>;
phandle = <0x9>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a57-64bit", "arm,armv8";
reg = <0x0 0x101>;
enable-method = "psci";
cpu-idle-states = <0x5>;
cpu-ipc = <0x2f0>;
next-level-cache = <0x6>;
status = "okay";
linux,phandle = <0xa>;
phandle = <0xa>;
};
cpu@4 {
device_type = "cpu";
compatible = "arm,cortex-a57-64bit", "arm,armv8";
reg = <0x0 0x102>;
enable-method = "psci";
cpu-idle-states = <0x5>;
cpu-ipc = <0x2f0>;
next-level-cache = <0x6>;
status = "okay";
linux,phandle = <0xb>;
phandle = <0xb>;
};
cpu@5 {
device_type = "cpu";
compatible = "arm,cortex-a57-64bit", "arm,armv8";
reg = <0x0 0x103>;
enable-method = "psci";
cpu-idle-states = <0x5>;
cpu-ipc = <0x2f0>;
next-level-cache = <0x6>;
status = "okay";
linux,phandle = <0xc>;
phandle = <0xc>;
};
l2-cache0 {
compatible = "cache";
cache-unified;
cache-level = <0x2>;
linux,phandle = <0x6>;
phandle = <0x6>;
};
l2-cache1 {
compatible = "cache";
cache-unified;
cache-level = <0x2>;
linux,phandle = <0x4>;
phandle = <0x4>;
};
};
arm-pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <0x0 0x140 0x4 0x0 0x141 0x4 0x0 0x128 0x4 0x0 0x129 0x4 0x0 0x12a 0x4 0x0 0x12b 0x4>;
interrupt-affinity = <0x7 0x8 0x9 0xa 0xb 0xc>;
};
denver-pmu {
compatible = "nvidia,denver15-pmu";
interrupts = <0x0 0x122 0x4>;
interrupt-affinity = <0x7>;
};
aliases {
sdhci0 = "/sdhci@3400000";
sdhci1 = "/sdhci@3420000";
sdhci2 = "/sdhci@3440000";
sdhci3 = "/sdhci@3460000";
i2c0 = "/i2c@3160000";
i2c1 = "/i2c@c240000";
i2c2 = "/i2c@3180000";
i2c3 = "/i2c@3190000";
i2c4 = "/bpmp_i2c";
i2c5 = "/i2c@31b0000";
i2c6 = "/i2c@31c0000";
i2c7 = "/i2c@c250000";
i2c8 = "/i2c@31e0000";
spi0 = "/spi@3210000";
spi1 = "/spi@c260000";
spi2 = "/spi@3230000";
spi3 = "/spi@3240000";
tegra-camera-rtcpu = "/rtcpu@b000000";
spi4 = "/aon_spi@c260000";
qspi6 = "/spi@3270000";
serial0 = "/serial@3100000";
serial1 = "/serial@3110000";
serial2 = "/serial@c280000";
serial3 = "/serial@3130000";
serial4 = "/serial@3140000";
serial5 = "/serial@3150000";
serial6 = "/serial@c290000";
rtc1 = "/rtc@c2a0000";
rtc0 = "/bpmp_i2c/spmic@3c";
};
sdhci@3460000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x3460000 0x0 0x210>;
interrupts = <0x0 0x41 0x4>;
max-clk-limit = <0xbb288cc>;
ddr-clk-limit = <0x2dc6c00>;
nvidia,rate-change-needs-clock-enabled;
tap-delay = <0x9>;
trim-delay = <0x5>;
nvidia,ddr-tap-delay = <0x9>;
ddr-trim-delay = <0x5>;
dqs-trim-delay = <0x3f>;
dqs-trim-delay-hs533 = <0x28>;
mmc-ocr-mask = <0x0>;
bus-width = <0x8>;
ignore-pm-notify;
keep-power-in-suspend;
non-removable;
cap-mmc-highspeed;
cap-sd-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
compad-vref-3v3 = <0x7>;
compad-vref-1v8 = <0x7>;
uhs-mask = <0x0>;
nvidia,is-emmc;
calib-3v3-offsets = <0x505>;
calib-1v8-offsets = <0x505>;
pll_source = "pll_p", "pll_c4_out0";
resets = <0xd 0x24>;
reset-names = "sdmmc";
clocks = <0xd 0x36 0xd 0x10d 0xd 0x114>;
clock-names = "sdmmc", "pll_p", "pll_c4_out0";
#stream-id-cells = <0x1>;
status = "okay";
nvidia,enable-strobe-mode;
nvidia,en-periodic-cflush;
nvidia,periodic-cflush-to = <0x64>;
nvidia,enable-hwcq;
vqmmc-supply = <0xe>;
vmmc-supply = <0xf>;
linux,phandle = <0x69>;
phandle = <0x69>;
prod-settings {
#prod-cells = <0x3>;
mask-one-style;
comp-vref-default {
prod = <0x1e0 0xf 0x7>;
};
comp-vref-1v8 {
prod = <0x1e0 0xf 0x7>;
};
comp-vref-3v3 {
prod = <0x1e0 0xf 0x7>;
};
tap-delay-ddr {
prod = <0x100 0xff0000 0x90000>;
};
trim-delay-ddr {
prod = <0x100 0x1f000000 0x5000000>;
};
tap-delay-default {
prod = <0x100 0xff0000 0x90000>;
};
tun-iterations-hs200 {
prod = <0x1c0 0xe000 0x4000>;
};
tun-iterations-hs400 {
prod = <0x1c0 0xe000 0x4000>;
};
tun-iterations-sdr104 {
prod = <0x1c0 0xe000 0x4000>;
};
tun-iterations-sdr50 {
prod = <0x1c0 0xe000 0x8000>;
};
tun-iterations-hs533 {
prod = <0x1c0 0xe000 0x2000>;
};
prod-reset {
prod = <0x100 0x1fff002e 0x5090028 0x1c0 0x8001fc0 0x8000040 0x1c4 0x77 0x0 0x120 0x20001 0x1 0x128 0x43000000 0x0>;
};
autocal-en {
prod = <0x1e4 0x20000000 0x20000000>;
};
autocal-pu-pd-offset-hs533-1v8 {
prod = <0x1e4 0x7f7f 0x505>;
};
autocal-pu-pd-offset-hs400-1v8 {
prod = <0x1e4 0x7f7f 0x505>;
};
autocal-pu-pd-offset-hs200-1v8 {
prod = <0x1e4 0x7f7f 0x505>;
};
autocal-pu-pd-offset-default-1v8 {
prod = <0x1e4 0x7f7f 0x0>;
};
autocal-pu-pd-offset-default-3v3 {
prod = <0x1e4 0x7f7f 0x0>;
};
};
};
sdhci@3440000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x3440000 0x0 0x210>;
interrupts = <0x0 0x40 0x4>;
max-clk-limit = <0xc28cb00>;
ddr-clk-limit = <0x2dc6c00>;
tap-delay = <0xb>;
trim-delay = <0x5>;
nvidia,ddr-tap-delay = <0xb>;
ddr-trim-delay = <0x5>;
bus-width = <0x4>;
ignore-pm-notify;
mmc-ocr-mask = <0x0>;
keep-power-in-suspend;
non-removable;
cap-mmc-highspeed;
cap-sd-highspeed;
pwrdet-support;
compad-vref-3v3 = <0x1>;
compad-vref-1v8 = <0x2>;
uhs-mask = <0x8>;
pll_source = "pll_p";
resets = <0xd 0x23>;
reset-names = "sdmmc";
clocks = <0xd 0x4c 0xd 0x10d>;
clock-names = "sdmmc", "pll_p";
#stream-id-cells = <0x1>;
pad-controllers = <0x10 0x1c>;
pad-names = "sdmmc";
nvidia,en-periodic-calib;
status = "okay";
vqmmc-supply = <0x11>;
vmmc-supply = <0xe>;
linux,phandle = <0xff>;
phandle = <0xff>;
prod-settings {
#prod-cells = <0x3>;
mask-one-style;
comp-vref-default {
prod = <0x1e0 0xf 0x7>;
};
comp-vref-3v3 {
prod = <0x1e0 0xf 0x1>;
};
comp-vref-1v8 {
prod = <0x1e0 0xf 0x2>;
};
tap-delay-ddr {
prod = <0x100 0xff0000 0xb0000>;
};
trim-delay-ddr {
prod = <0x100 0x1f000000 0x5000000>;
};
tap-delay-default {
prod = <0x100 0xff0000 0xb0000>;
};
tun-iterations-sdr104 {
prod = <0x1c0 0xe000 0x4000>;
};
tun-iterations-sdr50 {
prod = <0x1c0 0xe000 0x8000>;
};
prod-reset {
prod = <0x100 0x1fff002e 0x5090028 0x1c0 0x8001fc0 0x8000040 0x1c4 0x77 0x0 0x120 0x20001 0x1 0x128 0x43000000 0x0>;
};
autocal-en {
prod = <0x1e4 0x20000000 0x20000000>;
};
autocal-pu-pd-offset-default-3v3 {
prod = <0x1e4 0x7f7f 0x7a00>;
};
autocal-pu-pd-offset-default-1v8 {
prod = <0x1e4 0x7f7f 0x7a00>;
};
autocal-pu-pd-offset-hs-3v3 {
prod = <0x1e4 0x7f7f 0x7a00>;
};
autocal-pu-pd-offset-hs-1v8 {
prod = <0x1e4 0x7f7f 0x6a76>;
};
autocal-pu-pd-offset-sdr104-1v8 {
prod = <0x1e4 0x7f7f 0x7a00>;
};
};
};
sdhci@3420000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x3420000 0x0 0x210>;
interrupts = <0x0 0x3f 0x4>;
max-clk-limit = <0xbebc200>;
ddr-clk-limit = <0x2dc6c00>;
tap-delay = <0xb>;
trim-delay = <0x5>;
nvidia,ddr-tap-delay = <0xb>;
ddr-trim-delay = <0x5>;
mmc-ocr-mask = <0x0>;
bus-width = <0x8>;
ignore-pm-notify;
keep-power-in-suspend;
non-removable;
cap-mmc-highspeed;
cap-sd-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
pwrdet-support;
compad-vref-3v3 = <0x1>;
compad-vref-1v8 = <0x2>;
uhs-mask = <0x60>;
nvidia,is-emmc;
pll_source = "pll_p";
resets = <0xd 0x22>;
reset-names = "sdmmc";
clocks = <0xd 0x35 0xd 0x10d>;
clock-names = "sdmmc", "pll_p";
#stream-id-cells = <0x1>;
pad-controllers = <0x10 0x1b>;
pad-names = "sdmmc";
nvidia,disable-rtpm;
status = "disabled";
vqmmc-supply = <0xe>;
vmmc-supply = <0xf>;
linux,phandle = <0x6a>;
phandle = <0x6a>;
};
sdhci@3400000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x3400000 0x0 0x210>;
interrupts = <0x0 0x3e 0x4>;
max-clk-limit = <0xc28cb00>;
ddr-clk-limit = <0x2dc6c00>;
tap-delay = <0xb>;
trim-delay = <0x5>;
nvidia,ddr-tap-delay = <0xb>;
ddr-trim-delay = <0x5>;
mmc-ocr-mask = <0x3>;
bus-width = <0x4>;
ignore-pm-notify;
keep-power-in-suspend;
cap-mmc-highspeed;
cap-sd-highspeed;
pwrdet-support;
compad-vref-3v3 = <0x1>;
compad-vref-1v8 = <0x2>;
uhs-mask = <0x8>;
pll_source = "pll_p";
resets = <0xd 0x21>;
reset-names = "sdmmc";
clocks = <0xd 0x34 0xd 0x10d>;
clock-names = "sdmmc", "pll_p";
#stream-id-cells = <0x1>;
pad-controllers = <0x10 0x1a>;
pad-names = "sdmmc";
nvidia,en-periodic-calib;
status = "okay";
cd-gpios = <0x12 0x7e 0x0>;
wp-gpios = <0x12 0x7c 0x0>;
cd-inverted;
wp-inverted;
vqmmc-supply = <0x13>;
vmmc-supply = <0x14>;
linux,phandle = <0x6b>;
phandle = <0x6b>;
prod-settings {
#prod-cells = <0x3>;
mask-one-style;
comp-vref-default {
prod = <0x1e0 0xf 0x7>;
};
comp-vref-3v3 {
prod = <0x1e0 0xf 0x1>;
};
comp-vref-1v8 {
prod = <0x1e0 0xf 0x2>;
};
tap-delay-default {
prod = <0x100 0xff0000 0xb0000>;
};
tun-iterations-sdr104 {
prod = <0x1c0 0xe000 0x4000>;
};
tun-iterations-sdr50 {
prod = <0x1c0 0xe000 0x8000>;
};
prod-reset {
prod = <0x100 0x1fff002e 0x5090028 0x1c0 0x8001fc0 0x8000040 0x1c4 0x77 0x0 0x120 0x20001 0x1 0x128 0x43000000 0x0>;
};
autocal-en {
prod = <0x1e4 0x20000000 0x20000000>;
};
autocal-pu-pd-offset-default-3v3 {
prod = <0x1e4 0x7f7f 0x0>;
};
autocal-pu-pd-offset-default-1v8 {
prod = <0x1e4 0x7f7f 0x0>;
};
autocal-pu-pd-offset-hs-3v3 {
prod = <0x1e4 0x7f7f 0x0>;
};
autocal-pu-pd-offset-hs-1v8 {
prod = <0x1e4 0x7f7f 0x0>;
};
autocal-pu-pd-offset-sdr104-1v8 {
prod = <0x1e4 0x7f7f 0x503>;
};
autocal-pu-pd-offset-sdr50-1v8 {
prod = <0x1e4 0x7f7f 0x0>;
};
};
};
pinmux@2430000 {
compatible = "nvidia,tegra186-pinmux";
reg = <0x0 0x2430000 0x0 0x15000 0x0 0xc300000 0x0 0x4000>;
#gpio-range-cells = <0x3>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <0x15>;
linux,phandle = <0xbe>;
phandle = <0xbe>;
devslp_active {
linux,phandle = <0x16>;
phandle = <0x16>;
sata {
nvidia,pins = "pex_l2_clkreq_n_pa6";
nvidia,function = "sata";
nvidia,pull = <0x0>;
nvidia,enable-input = <0x0>;
nvidia,io-high-voltage = <0x1>;
nvidia,lpdr = <0x1>;
};
};
devslp_pullup {
linux,phandle = <0x17>;
phandle = <0x17>;
sata {
nvidia,pins = "pex_l2_clkreq_n_pa6";
nvidia,function = "sata";
nvidia,pull = <0x2>;
};
};
dmic1_dap_active {
linux,phandle = <0xdd>;
phandle = <0xdd>;
dmic_dmic1_clk_pm1 {
nvidia,pins = "dmic1_clk_pm1";
nvidia,function = "dmic1";
};
dmic_dmic1_dat_pm0 {
nvidia,pins = "dmic1_dat_pm0";
nvidia,function = "dmic1";
};
};
dmic2_dap_active {
linux,phandle = <0xde>;
phandle = <0xde>;
dmic_dmic2_dat_pm2 {
nvidia,pins = "dmic2_dat_pm2";
nvidia,function = "dmic2";
};
dmic_dmic2_clk_pm3 {
nvidia,pins = "dmic2_clk_pm3";
nvidia,function = "dmic2";
};
};
dmic3_dap_active {
linux,phandle = <0xdf>;
phandle = <0xdf>;
dmic_can_gpio0_paa0 {
nvidia,pins = "can_gpio0_paa0";
nvidia,function = "dmic3";
};
dmic_can_gpio1_paa1 {
nvidia,pins = "can_gpio1_paa1";
nvidia,function = "dmic3";
};
};
dmic3_dap_inactive {
linux,phandle = <0xe0>;
phandle = <0xe0>;
dmic_can_gpio0_paa0 {
nvidia,pins = "can_gpio0_paa0";
nvidia,function = "dmic5";
};
dmic_can_gpio1_paa1 {
nvidia,pins = "can_gpio1_paa1";
nvidia,function = "dmic5";
};
};
dmic4_dap_active {
linux,phandle = <0xe1>;
phandle = <0xe1>;
dmic_dmic4_dat_pm4 {
nvidia,pins = "dmic4_dat_pm4";
nvidia,function = "dmic4";
};
dmic_dmic4_clk_pm5 {
nvidia,pins = "dmic4_clk_pm5";
nvidia,function = "dmic4";
};
};
i2s3_dap_active {
linux,phandle = <0xdc>;
phandle = <0xdc>;
i2s3_dmic1_clk_pm1 {
nvidia,pins = "dmic1_clk_pm1";
nvidia,function = "i2s3";
};
i2s3_dmic1_dat_pm0 {
nvidia,pins = "dmic1_dat_pm0";
nvidia,function = "i2s3";
};
i2s3_dmic2_dat_pm2 {
nvidia,pins = "dmic2_dat_pm2";
nvidia,function = "i2s3";
};
i2s3_dmic2_clk_pm3 {
nvidia,pins = "dmic2_clk_pm3";
nvidia,function = "i2s3";
};
};
common {
linux,phandle = <0x15>;
phandle = <0x15>;
gpio_edp2_pp5 {
nvidia,pins = "gpio_edp2_pp5";
nvidia,pull = <0x2>;
nvidia,tristate = <0x1>;
nvidia,enable-input = <0x1>;
status = "disabled";
};
gpio_edp3_pp6 {
nvidia,pins = "gpio_edp3_pp6";
nvidia,pull = <0x0>;
nvidia,tristate = <0x0>;
nvidia,enable-input = <0x0>;
status = "disabled";
};
};
};
ahci-sata@3507000 {
compatible = "nvidia,tegra186-ahci-sata";
reg = <0x0 0x3507000 0x0 0x2000 0x0 0x3501000 0x0 0x6000 0x0 0x3500000 0x0 0x1000 0x0 0x3a90000 0x0 0x10000>;
reg-names = "sata-ahci", "sata-config", "sata-ipfs", "sata-aux";
interrupts = <0x0 0xc5 0x4>;
#stream-id-cells = <0x1>;
clocks = <0xd 0x63 0xd 0x64 0xd 0x204 0xd 0x10d>;
clock-names = "sata", "sata-oob", "pllp", "pllp-uphy";
resets = <0xd 0x1f 0xd 0x20>;
reset-names = "sata", "sata-cold";
pinctrl-names = "devslp_active", "devslp_pullup";
pinctrl-0 = <0x16>;
pinctrl-1 = <0x17>;
nvidia,disable-features = "devslp", "dipm";
nvidia,link-flags = "min_power";
status = "okay";
linux,phandle = <0x74>;
phandle = <0x74>;
prod-settings {
#prod-cells = <0x4>;
mask-one-style;
prod {
prod = <0x1 0x52c 0xffffffff 0x31ce0 0x1 0x338 0x10000000 0x10000000>;
};
};
};
ufshci@2450000 {
compatible = "tegra,ufs_variant";
reg = <0x0 0x2450000 0x0 0x4000>;
interrupts = <0x0 0x2c 0x4>;
#stream-id-cells = <0x1>;
clocks = <0xd 0x94 0xd 0x8e 0xd 0x93 0xd 0x90 0xd 0x8c 0xd 0x8f 0xd 0x8d 0xd 0x91 0xd 0xb2 0xd 0xb3 0xd 0x10d 0xd 0x261>;
clock-names = "mphy_core_pll_fixed", "mphy_l0_tx_symb", "mphy_tx_1mhz_ref", "mphy_l0_rx_ana", "mphy_l0_rx_symb", "mphy_l0_tx_ls_3xbit", "mphy_l0_rx_ls_bit", "mphy_l1_rx_ana", "ufshc", "ufsdev_ref", "pll_p", "clk_m";
resets = <0xd 0x56 0xd 0x57 0xd 0x94 0xd 0x95 0xd 0x93 0xd 0x71 0xd 0x72 0xd 0xc0>;
reset-names = "mphy-l0-rx-rst", "mphy-l0-tx-rst", "mphy-l1-rx-rst", "mphy-l1-tx-rst", "mphy-clk-ctl-rst", "ufs-rst", "ufs-axi-m-rst", "ufshc-lp-rst";
nvidia,enable-x2-config;
nvidia,enable-rx-calib;
nvidia,enable-hs-mode;
nvidia,mask-fast-auto-mode;
nvidia,max-hs-gear = <0x3>;
nvidia,max-pwm-gear = <0x4>;
vcc-max-microamp = <0x0>;
vccq-max-microamp = <0x0>;
vccq2-max-microamp = <0x0>;
pad-controllers = <0x10 0x24>;
pad-names = "ufs";
status = "disabled";
linux,phandle = <0x6c>;
phandle = <0x6c>;
ufs_variant {
compatible = "tegra,ufs_variant";
};
};
i2c@3160000 {
#address-cells = <0x1>;
#size-cells = <0x0>;
#stream-id-cells = <0x1>;
compatible = "nvidia,tegra186-i2c";
reg = <0x0 0x3160000 0x0 0x100>;
interrupts = <0x0 0x19 0x4>;
scl-gpio = <0x12 0x15 0x0>;
sda-gpio = <0x12 0x16 0x0>;
status = "okay";
clock-frequency = <0x61a80>;
clocks = <0xd 0x2f 0xd 0x10d>;
clock-names = "div-clk", "parent";
resets = <0xd 0x13>;
reset-names = "i2c";
dmas = <0x18 0x15 0x18 0x15>;
dma-names = "rx", "tx";
linux,phandle = <0x84>;
phandle = <0x84>;
prod-settings {
mask-one-style;
prod_c_fm {
prod = <0x6c 0xffff0000 0x190000 0x94 0x3f00 0x200>;
};
prod_c_fmplus {
prod = <0x6c 0xffff0000 0x100000 0x94 0x3f00 0x200>;
};
prod_c_hs {
prod = <0x6c 0xffff 0x2 0x9c 0x3f00 0x300>;
};
prod_c_sm {
prod = <0x6c 0xffff0000 0x160000 0x94 0x3f00 0x300>;
};
};
lp8557-backlight-s-wuxga-8-0@2c {
status = "disabled";
disable-on-kernel-charging;
compatible = "ti,lp8557";
reg = <0x2c>;
power-supply = <0x19>;
bl-name = "pwm-backlight";
init-brt = [ff];
dev-ctrl = [80];
pwm-period = <0x9ce1>;
pwm-names = "lp8557";
pwms = <0x1a 0x0 0x9ce1>;
bl-measured = <0x0 0x1 0x2 0x3 0x4 0x5 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xb 0xc 0xd 0xe 0xf 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x25 0x26 0x27 0x28 0x29 0x29 0x2a 0x2b 0x2c 0x2d 0x2e 0x2f 0x30 0x30 0x31 0x32 0x33 0x34 0x35 0x36 0x36 0x37 0x38 0x39 0x3a 0x3a 0x3b 0x3c 0x3d 0x3e 0x3f 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4a 0x4b 0x4b 0x4c 0x4d 0x4e 0x4f 0x50 0x51 0x52 0x53 0x54 0x55 0x56 0x57 0x58 0x59 0x5a 0x5b 0x5c 0x5d 0x5e 0x5e 0x5f 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x68 0x69 0x6a 0x6b 0x6c 0x6d 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a 0x7b 0x7d 0x7e 0x7f 0x80 0x81 0x82 0x83 0x84 0x85 0x86 0x87 0x88 0x89 0x8a 0x8b 0x8c 0x8d 0x8e 0x8f 0x90 0x92 0x93 0x94 0x95 0x96 0x97 0x98 0x99 0x9a 0x9b 0x9c 0x9d 0x9e 0x9f 0xa0 0xa1 0xa2 0xa3 0xa4 0xa5 0xa7 0xa8 0xa9 0xaa 0xab 0xac 0xad 0xae 0xaf 0xb0 0xb2 0xb3 0xb4 0xb5 0xb6 0xb7 0xb8 0xb9 0xba 0xbb 0xbc 0xbd 0xbe 0xbf 0xc0 0xc1 0xc2 0xc3 0xc4 0xc5 0xc7 0xc8 0xc9 0xca 0xcb 0xcc 0xcd 0xce 0xcf 0xd0 0xd2 0xd3 0xd4 0xd5 0xd6 0xd7 0xd8 0xd9 0xdb 0xdc 0xdd 0xde 0xdf 0xe1 0xe2 0xe3 0xe4 0xe5 0xe6 0xe7 0xe9 0xea 0xeb 0xec 0xed 0xee 0xef 0xf0 0xf1 0xf2 0xf4 0xf5 0xf6 0xf7 0xf8 0xf9 0xfa 0xfb 0xfd 0xfe 0xff>;
bl-curve = <0x0 0x1 0x1 0x2 0x2 0x3 0x3 0x4 0x4 0x5 0x5 0x6 0x7 0x7 0x8 0x8 0x9 0x9 0xa 0xa 0xb 0xb 0xc 0xc 0xd 0xe 0xe 0xf 0xf 0x10 0x10 0x11 0x11 0x12 0x12 0x13 0x14 0x14 0x15 0x15 0x16 0x16 0x17 0x17 0x18 0x18 0x19 0x19 0x1a 0x1b 0x1b 0x1c 0x1c 0x1d 0x1d 0x1e 0x1e 0x1f 0x1f 0x20 0x21 0x21 0x22 0x22 0x23 0x23 0x24 0x24 0x25 0x25 0x26 0x26 0x27 0x28 0x28 0x29 0x29 0x2a 0x2a 0x2b 0x2b 0x2c 0x2c 0x2d 0x2e 0x2e 0x2f 0x2f 0x30 0x30 0x31 0x31 0x32 0x32 0x33 0x34 0x34 0x35 0x35 0x36 0x36 0x37 0x37 0x38 0x38 0x39 0x39 0x3a 0x3b 0x3b 0x3c 0x3c 0x3d 0x3d 0x3e 0x3e 0x3f 0x3f 0x40 0x41 0x41 0x42 0x42 0x43 0x43 0x44 0x44 0x45 0x45 0x46 0x46 0x47 0x48 0x48 0x49 0x49 0x4a 0x4a 0x4b 0x4b 0x4c 0x4c 0x4d 0x4e 0x4e 0x4f 0x4f 0x50 0x50 0x51 0x51 0x52 0x52 0x53 0x53 0x54 0x55 0x55 0x56 0x56 0x57 0x57 0x58 0x58 0x59 0x59 0x5a 0x5c 0x5e 0x60 0x61 0x63 0x65 0x67 0x69 0x6b 0x6d 0x6e 0x70 0x72 0x74 0x76 0x78 0x7a 0x7b 0x7d 0x7f 0x81 0x83 0x85 0x86 0x88 0x8a 0x8c 0x8e 0x90 0x92 0x93 0x95 0x97 0x99 0x9b 0x9d 0x9f 0xa0 0xa2 0xa4 0xa6 0xa8 0xaa 0xac 0xad 0xaf 0xb1 0xb3 0xb5 0xb7 0xb9 0xba 0xbc 0xbe 0xc0 0xc2 0xc4 0xc6 0xc7 0xc9 0xcb 0xcd 0xcf 0xd1 0xd3 0xd4 0xd6 0xd8 0xda 0xdc 0xde 0xdf 0xe1 0xe3 0xe5 0xe7 0xe9 0xeb 0xec 0xee 0xf0 0xf2 0xf4 0xf6 0xf8 0xf9 0xfb 0xfd 0xff>;
rom_14h {
rom-addr = [14];
rom-val = [9f];
};
rom_13h {
rom-addr = [13];
rom-val = [01];
};
rom_11h {
rom-addr = [11];
rom-val = [05];
};
};
ina3221x@40 {
compatible = "ti,ina3221x";
reg = <0x40>;
ti,trigger-config = <0x7003>;
ti,continuous-config = <0x7c07>;
ti,enable-forced-continuous;
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x100>;
phandle = <0x100>;
channel@0 {
reg = <0x0>;
ti,rail-name = "VDD_SYS_GPU";
ti,shunt-resistor-mohm = <0x5>;
};
channel@1 {
reg = <0x1>;
ti,rail-name = "VDD_SYS_SOC";
ti,shunt-resistor-mohm = <0x5>;
};
channel@2 {
reg = <0x2>;
ti,rail-name = "VDD_4V0_WIFI";
ti,shunt-resistor-mohm = <0xa>;
};
};
ina3221x@41 {
compatible = "ti,ina3221x";
reg = <0x41>;
ti,trigger-config = <0x7003>;
ti,continuous-config = <0x7c07>;
ti,enable-forced-continuous;
#address-cells = <0x1>;
#size-cells = <0x0>;
linux,phandle = <0x101>;
phandle = <0x101>;
channel@0 {
reg = <0x0>;