diff --git a/clint.c b/clint.c deleted file mode 100644 index fd3c8e9..0000000 --- a/clint.c +++ /dev/null @@ -1,96 +0,0 @@ -#include -#include "device.h" -#include "riscv.h" -#include "riscv_private.h" - -void clint_update_interrupts(hart_t *hart, clint_state_t *clint) -{ - uint64_t time_delta = - clint->mtimecmp[hart->mhartid] - semu_timer_get(&hart->time); - if ((int64_t) time_delta <= 0) - hart->sip |= RV_INT_STI_BIT; - else - hart->sip &= ~RV_INT_STI_BIT; - - if (clint->msip[hart->mhartid]) { - hart->sip |= RV_INT_SSI_BIT; - } else - hart->sip &= ~RV_INT_SSI_BIT; -} - -static bool clint_reg_read(clint_state_t *clint, uint32_t addr, uint32_t *value) -{ - if (addr < 0x4000) { - *value = clint->msip[addr >> 2]; - return true; - } - - if (addr < 0xBFF8) { - addr -= 0x4000; - *value = - (uint32_t) (clint->mtimecmp[addr >> 3] >> (32 & -!!(addr & 0b100))); - return true; - } - - if (addr < 0xBFFF) { - *value = (uint32_t) (semu_timer_get(&clint->mtime) >> - (32 & -!!(addr & 0b100))); - return true; - } - return false; -} - -static bool clint_reg_write(clint_state_t *clint, uint32_t addr, uint32_t value) -{ - if (addr < 0x4000) { - clint->msip[addr >> 2] = value; - return true; - } - - if (addr < 0xBFF8) { - addr -= 0x4000; - int32_t upper = clint->mtimecmp[addr >> 3] >> 32; - int32_t lowwer = clint->mtimecmp[addr >> 3]; - if (addr & 0b100) - upper = value; - else - lowwer = value; - - clint->mtimecmp[addr >> 3] = (uint64_t) upper << 32 | lowwer; - return true; - } - - if (addr < 0xBFFF) { - int32_t upper = clint->mtime.begin >> 32; - int32_t lower = clint->mtime.begin; - if (addr & 0b100) - upper = value; - else - lower = value; - - semu_timer_rebase(&clint->mtime, (uint64_t) upper << 32 | lower); - return true; - } - return false; -} - -void clint_read(hart_t *vm, - clint_state_t *clint, - uint32_t addr, - uint8_t width, - uint32_t *value) -{ - if (!clint_reg_read(clint, addr, value)) - vm_set_exception(vm, RV_EXC_LOAD_FAULT, vm->exc_val); - *value = (*value) >> (RV_MEM_SW - width); -} - -void clint_write(hart_t *vm, - clint_state_t *clint, - uint32_t addr, - uint8_t width, - uint32_t value) -{ - if (!clint_reg_write(clint, addr, value >> (RV_MEM_SW - width))) - vm_set_exception(vm, RV_EXC_STORE_FAULT, vm->exc_val); -} diff --git a/device.h b/device.h index 0a6a521..23d195a 100644 --- a/device.h +++ b/device.h @@ -172,7 +172,6 @@ void virtio_blk_write(hart_t *vm, uint32_t *virtio_blk_init(virtio_blk_state_t *vblk, char *disk_file); #endif /* SEMU_HAS(VIRTIOBLK) */ -#if SEMU_HAS(ACLINT) /* ACLINT MTIMER */ typedef struct { uint64_t mtimecmp[4095]; // Machine Timer Compare array @@ -224,26 +223,6 @@ void aclint_sswi_write(hart_t *hart, uint32_t addr, uint8_t width, uint32_t value); -#else -/* clint */ -typedef struct { - uint32_t msip[4096]; - uint64_t mtimecmp[4095]; - semu_timer_t mtime; -} clint_state_t; - -void clint_update_interrupts(hart_t *vm, clint_state_t *clint); -void clint_read(hart_t *vm, - clint_state_t *clint, - uint32_t addr, - uint8_t width, - uint32_t *value); -void clint_write(hart_t *vm, - clint_state_t *clint, - uint32_t addr, - uint8_t width, - uint32_t value); -#endif /* memory mapping */ typedef struct { @@ -258,12 +237,8 @@ typedef struct { #if SEMU_HAS(VIRTIOBLK) virtio_blk_state_t vblk; #endif -#if SEMU_HAS(ACLINT) /* ACLINT */ mtimer_state_t mtimer; mswi_state_t mswi; sswi_state_t sswi; -#else - clint_state_t clint; -#endif } emu_state_t; diff --git a/feature.h b/feature.h index 810fb3c..1dee984 100644 --- a/feature.h +++ b/feature.h @@ -12,10 +12,5 @@ #define SEMU_FEATURE_VIRTIONET 1 #endif -/* ACLINT */ -#ifndef SEMU_FEATURE_ACLINT -#define SEMU_FEATURE_ACLINT 1 -#endif - /* Feature test macro */ #define SEMU_HAS(x) SEMU_FEATURE_##x diff --git a/main.c b/main.c index e47ee2e..42369c6 100644 --- a/main.c +++ b/main.c @@ -77,23 +77,16 @@ static void emu_update_timer_interrupt(hart_t *hart) emu_state_t *data = PRIV(hart); /* Sync global timer with local timer */ -#if SEMU_HAS(ACLINT) hart->time = data->mtimer.mtime; aclint_mtimer_update_interrupts(hart, &data->mtimer); -#else - hart->time = data->clint.mtime; - clint_update_interrupts(hart, &data->clint); -#endif } -#if SEMU_HAS(ACLINT) static void emu_update_swi_interrupt(hart_t *hart) { emu_state_t *data = PRIV(hart); aclint_mswi_update_interrupts(hart, &data->mswi); aclint_sswi_update_interrupts(hart, &data->sswi); } -#endif static void mem_load(hart_t *hart, uint32_t addr, @@ -131,7 +124,6 @@ static void mem_load(hart_t *hart, emu_update_vblk_interrupts(hart->vm); return; #endif -#if SEMU_HAS(ACLINT) case 0x43: /* mtimer */ aclint_mtimer_read(hart, &data->mtimer, addr & 0xFFFFF, width, value); @@ -145,12 +137,6 @@ static void mem_load(hart_t *hart, aclint_sswi_read(hart, &data->sswi, addr & 0xFFFFF, width, value); aclint_sswi_update_interrupts(hart, &data->sswi); return; -#else - case 0x43: /* clint */ - clint_read(hart, &data->clint, addr & 0xFFFFF, width, value); - clint_update_interrupts(hart, &data->clint); - return; -#endif } } vm_set_exception(hart, RV_EXC_LOAD_FAULT, hart->exc_val); @@ -192,7 +178,6 @@ static void mem_store(hart_t *hart, emu_update_vblk_interrupts(hart->vm); return; #endif -#if SEMU_HAS(ACLINT) case 0x43: /* mtimer */ aclint_mtimer_write(hart, &data->mtimer, addr & 0xFFFFF, width, value); @@ -206,12 +191,6 @@ static void mem_store(hart_t *hart, aclint_sswi_write(hart, &data->sswi, addr & 0xFFFFF, width, value); aclint_sswi_update_interrupts(hart, &data->sswi); return; -#else - case 0x43: /* clint */ - clint_write(hart, &data->clint, addr & 0xFFFFF, width, value); - clint_update_interrupts(hart, &data->clint); - return; -#endif } } vm_set_exception(hart, RV_EXC_STORE_FAULT, hart->exc_val); @@ -231,15 +210,9 @@ static inline sbi_ret_t handle_sbi_ecall_TIMER(hart_t *hart, int32_t fid) emu_state_t *data = PRIV(hart); switch (fid) { case SBI_TIMER__SET_TIMER: -#if SEMU_HAS(ACLINT) data->mtimer.mtimecmp[hart->mhartid] = (((uint64_t) hart->x_regs[RV_R_A1]) << 32) | (uint64_t) (hart->x_regs[RV_R_A0]); -#else - data->clint.mtimecmp[hart->mhartid] = - (((uint64_t) hart->x_regs[RV_R_A1]) << 32) | - (uint64_t) (hart->x_regs[RV_R_A0]); -#endif hart->sip &= ~RV_INT_STI_BIT; return (sbi_ret_t){SBI_SUCCESS, 0}; default: @@ -313,21 +286,11 @@ static inline sbi_ret_t handle_sbi_ecall_IPI(hart_t *hart, int32_t fid) hart_mask = (uint64_t) hart->x_regs[RV_R_A0]; hart_mask_base = (uint64_t) hart->x_regs[RV_R_A1]; if (hart_mask_base == 0xFFFFFFFFFFFFFFFF) { - for (uint32_t i = 0; i < hart->vm->n_hart; i++) { -#if SEMU_HAS(ACLINT) + for (uint32_t i = 0; i < hart->vm->n_hart; i++) data->sswi.ssip[i] = 1; -#else - data->clint.msip[i] = 1; -#endif - } } else { - for (int i = hart_mask_base; hart_mask; hart_mask >>= 1, i++) { -#if SEMU_HAS(ACLINT) + for (int i = hart_mask_base; hart_mask; hart_mask >>= 1, i++) data->sswi.ssip[i] = hart_mask & 1; -#else - data->clint.msip[i] = hart_mask & 1; -#endif - } } return (sbi_ret_t){SBI_SUCCESS, 0}; @@ -586,11 +549,7 @@ static int semu_start(int argc, char **argv) /* Initialize the emulator */ emu_state_t emu; memset(&emu, 0, sizeof(emu)); -#if SEMU_HAS(ACLINT) semu_timer_init(&emu.mtimer.mtime, CLOCK_FREQ); -#else - semu_timer_init(&emu.clint.mtime, CLOCK_FREQ); -#endif /* Set up RAM */ emu.ram = mmap(NULL, RAM_SIZE, PROT_READ | PROT_WRITE, @@ -680,9 +639,7 @@ static int semu_start(int argc, char **argv) } emu_update_timer_interrupt(vm.hart[i]); -#if SEMU_HAS(ACLINT) emu_update_swi_interrupt(vm.hart[i]); -#endif vm_step(vm.hart[i]); if (likely(!vm.hart[i]->error)) diff --git a/riscv.c b/riscv.c index c4d7154..c3fd394 100644 --- a/riscv.c +++ b/riscv.c @@ -805,11 +805,7 @@ void vm_step(hart_t *vm) uint8_t idx = ilog2(applicable); if (idx == 1) { emu_state_t *data = PRIV(vm); -#if SEMU_HAS(ACLINT) data->sswi.ssip[vm->mhartid] = 0; -#else - data->clint.msip[vm->mhartid] = 0; -#endif } vm->exc_cause = (1U << 31) | idx; vm->stval = 0; diff --git a/scripts/gen-clint-dts.py b/scripts/gen-clint-dts.py deleted file mode 100644 index 22df971..0000000 --- a/scripts/gen-clint-dts.py +++ /dev/null @@ -1,72 +0,0 @@ -import sys - -def cpu_template (id): - return f"""cpu{id}: cpu@{id} {{ - device_type = "cpu"; - compatible = "riscv"; - reg = <{id}>; - riscv,isa = "rv32ima"; - mmu-type = "riscv,sv32"; - cpu{id}_intc: interrupt-controller {{ - #interrupt-cells = <1>; - #address-cells = <0>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }}; - }}; - """ - -def cpu_format(nums): - s = "" - for i in range(nums): - s += cpu_template(i) - return s - -def plic_irq_format(nums): - s = "" - for i in range(nums): - s += f"<&cpu{i}_intc 9>, " - return s[:-2] - -def clint_irq_format(nums): - s = "" - for i in range(nums): - s += f"<&cpu{i}_intc 3 &cpu{i}_intc 7>, " - return s[:-2] - -def dtsi_template (cpu_list: str, plic_list, clint_list, clock_freq): - return f"""/{{ - cpus {{ - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <{clock_freq}>; - {cpu_list} - }}; - - soc: soc@F0000000 {{ - plic0: interrupt-controller@0 {{ - #interrupt-cells = <1>; - #address-cells = <0>; - compatible = "sifive,plic-1.0.0"; - reg = <0x0000000 0x4000000>; - interrupt-controller; - interrupts-extended = {plic_list}; - riscv,ndev = <31>; - }}; - - clint0: clint@4300000 {{ - compatible = "riscv,clint0"; - interrupts-extended = - {clint_list}; - reg = <0x4300000 0x10000>; - }}; - }}; -}}; -""" - -dtsi = sys.argv[1] -harts = int(sys.argv[2]) -clock_freq = int(sys.argv[3]) - -with open(dtsi, "w") as dts: - dts.write(dtsi_template(cpu_format(harts), plic_irq_format(harts), clint_irq_format(harts), clock_freq))