From 967bc10cf8f32cb79f0cb3852a697f622b2247b8 Mon Sep 17 00:00:00 2001
From: Jeremy Soller <jeremy@system76.com>
Date: Tue, 9 Nov 2021 15:23:50 -0700
Subject: [PATCH] Remove ESPI config and enable LPC decodes for EC command and
 debug

Change-Id: I301829fc67fc1b255cf1a6f468a5433b64e03828
---
 src/mainboard/system76/kudu6/bootblock.c   | 23 ++++++++++++++
 src/mainboard/system76/kudu6/devicetree.cb | 35 ----------------------
 2 files changed, 23 insertions(+), 35 deletions(-)

diff --git a/src/mainboard/system76/kudu6/bootblock.c b/src/mainboard/system76/kudu6/bootblock.c
index f768f3f7782..012763c08e4 100644
--- a/src/mainboard/system76/kudu6/bootblock.c
+++ b/src/mainboard/system76/kudu6/bootblock.c
@@ -1,9 +1,32 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <bootblock_common.h>
+#include <amdblocks/lpc.h>
+#include <console/console.h>
 #include "gpio.h"
 
 void bootblock_mainboard_early_init(void)
 {
+	post_code(0x76);
+	post_code(0x01);
+
 	mainboard_program_early_gpios();
+
+	post_code(0x76);
+	post_code(0x02);
+
+	// AP/EC command
+	lpc_set_wideio_range(0xE00, 256);
+
+	// AP/EC debug
+	lpc_set_wideio_range(0xF00, 256);
+
+	post_code(0x76);
+	post_code(0x03);
+}
+
+void bootblock_mainboard_init(void)
+{
+	post_code(0x76);
+	post_code(0x10);
 }
diff --git a/src/mainboard/system76/kudu6/devicetree.cb b/src/mainboard/system76/kudu6/devicetree.cb
index 9dddacb2b9e..cefa2c795e5 100644
--- a/src/mainboard/system76/kudu6/devicetree.cb
+++ b/src/mainboard/system76/kudu6/devicetree.cb
@@ -9,41 +9,6 @@ chip soc/amd/cezanne
 		.dmic_present = 1,
 	}"
 
-	register "common_config.espi_config" = "{
-		.std_io_decode_bitmap = ESPI_DECODE_IO_0x80_EN | ESPI_DECODE_IO_0X60_0X64_EN,
-		/* EC PM channel */
-		.generic_io_range[0] = {
-			.base = 0x62,
-			/*
-			 * Only 0x62 and 0x66 are required. But, this is not supported by
-			 * standard IO decodes and there are only 4 generic I/O windows
-			 * available. Hence, open a window from 0x62-0x67.
-			 */
-			.size = 5,
-		},
-		/* AP/EC debug */
-		.generic_io_range[1] = {
-			.base = 0xE00,
-			.size = 256,
-		},
-		/* AP/EC debug */
-		.generic_io_range[2] = {
-			.base = 0xF00,
-			.size = 256,
-		},
-
-		.io_mode = ESPI_IO_MODE_QUAD,
-		.op_freq_mhz = ESPI_OP_FREQ_33_MHZ,
-		.crc_check_enable = 1,
-		.alert_pin = ESPI_ALERT_PIN_OPEN_DRAIN,
-		.periph_ch_en = 1,
-		.vw_ch_en = 1,
-		.oob_ch_en = 0,
-		.flash_ch_en = 0,
-
-		.vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1),
-	}"
-
 	register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
 					GPIO_I2C2_SCL | GPIO_I2C3_SCL"
 	# I2C Pad Control RX Select Configuration