From 65eea8bd550c1a335d2f033abbb7fc2ec1e78a34 Mon Sep 17 00:00:00 2001 From: Muhammad Asif Manzoor Date: Thu, 1 Aug 2024 12:02:25 -0400 Subject: [PATCH] Add 'FileCheck' command to verify the correctness of tests. (#260) --- test/ttmlir/Silicon/TTNN/multiple_add_with_loc.mlir | 5 ++++- .../Silicon/TTNN/multiple_add_with_loc_grid_override.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_ge.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_matmul.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_multiply.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_relu.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_subtract.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/simple_sum.mlir | 5 ++++- test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline.mlir | 5 ++++- .../Silicon/TTNN/ttir_to_ttnn_pipeline_custom_opt.mlir | 5 ++++- 10 files changed, 40 insertions(+), 10 deletions(-) diff --git a/test/ttmlir/Silicon/TTNN/multiple_add_with_loc.mlir b/test/ttmlir/Silicon/TTNN/multiple_add_with_loc.mlir index a7a1f16195..aeda3e585f 100644 --- a/test/ttmlir/Silicon/TTNN/multiple_add_with_loc.mlir +++ b/test/ttmlir/Silicon/TTNN/multiple_add_with_loc.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint #loc = loc("test_ops.py:17_0_0":0:0) module @pybuda_graph attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { diff --git a/test/ttmlir/Silicon/TTNN/multiple_add_with_loc_grid_override.mlir b/test/ttmlir/Silicon/TTNN/multiple_add_with_loc_grid_override.mlir index 417013160f..1bcd05684f 100644 --- a/test/ttmlir/Silicon/TTNN/multiple_add_with_loc_grid_override.mlir +++ b/test/ttmlir/Silicon/TTNN/multiple_add_with_loc_grid_override.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline="override-grid-sizes=add_1_0=4x4,add_2_0=4x4" %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline="override-grid-sizes=add_1_0=4x4,add_2_0=4x4" %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint #loc = loc("test_ops.py:17_0_0":0:0) module @pybuda_graph attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { diff --git a/test/ttmlir/Silicon/TTNN/simple_ge.mlir b/test/ttmlir/Silicon/TTNN/simple_ge.mlir index 3f8691fee4..dfe7d72cf2 100644 --- a/test/ttmlir/Silicon/TTNN/simple_ge.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_ge.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>, %arg1: tensor<64x128xf32>) -> tensor<64x128xf32> { diff --git a/test/ttmlir/Silicon/TTNN/simple_matmul.mlir b/test/ttmlir/Silicon/TTNN/simple_matmul.mlir index b6d8f7a6a2..674610b076 100644 --- a/test/ttmlir/Silicon/TTNN/simple_matmul.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_matmul.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device_tile = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xbf16>, %arg1: tensor<128x96xbf16>) -> tensor<64x96xbf16> { diff --git a/test/ttmlir/Silicon/TTNN/simple_multiply.mlir b/test/ttmlir/Silicon/TTNN/simple_multiply.mlir index 5d833c37e7..f472b3d414 100644 --- a/test/ttmlir/Silicon/TTNN/simple_multiply.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_multiply.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>, %arg1: tensor<64x128xf32>) -> tensor<64x128xf32> { diff --git a/test/ttmlir/Silicon/TTNN/simple_relu.mlir b/test/ttmlir/Silicon/TTNN/simple_relu.mlir index b4b2d671ed..8fed334367 100644 --- a/test/ttmlir/Silicon/TTNN/simple_relu.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_relu.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>) -> tensor<64x128xf32> { diff --git a/test/ttmlir/Silicon/TTNN/simple_subtract.mlir b/test/ttmlir/Silicon/TTNN/simple_subtract.mlir index a02f2efa4d..013ca5aa91 100644 --- a/test/ttmlir/Silicon/TTNN/simple_subtract.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_subtract.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>, %arg1: tensor<64x128xf32>) -> tensor<64x128xf32> { diff --git a/test/ttmlir/Silicon/TTNN/simple_sum.mlir b/test/ttmlir/Silicon/TTNN/simple_sum.mlir index 641c1ef552..73ef67fff8 100644 --- a/test/ttmlir/Silicon/TTNN/simple_sum.mlir +++ b/test/ttmlir/Silicon/TTNN/simple_sum.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-layout --ttnn-open-device --convert-ttir-to-ttnn %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<512x1024xbf16>) -> tensor<512x32xbf16> { diff --git a/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline.mlir b/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline.mlir index f9ad930dbe..f0addb8b64 100644 --- a/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline.mlir +++ b/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>, %arg1: tensor<64x128xf32>) -> tensor<64x128xf32> { diff --git a/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline_custom_opt.mlir b/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline_custom_opt.mlir index 41a0da6a01..ace05695f5 100644 --- a/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline_custom_opt.mlir +++ b/test/ttmlir/Silicon/TTNN/ttir_to_ttnn_pipeline_custom_opt.mlir @@ -1,4 +1,7 @@ -// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline="enable-grid-set=false" %s | ttmlir-translate --ttnn-to-flatbuffer > %t.ttnn +// RUN: ttmlir-opt --ttir-to-ttnn-backend-pipeline="enable-grid-set=false" %s > %t.mlir +// RUN: FileCheck %s --input-file=%t.mlir +// RUN: ttmlir-translate --ttnn-to-flatbuffer %t.mlir > %t.ttnn + #any_device = #tt.operand_constraint module attributes {tt.system_desc = #tt.system_desc<[{arch = , grid = 8x8, l1_size = 1048576, num_dram_channels = 12, dram_channel_size = 1048576, noc_l1_address_align_bytes = 16, pcie_address_align_bytes = 32, noc_dram_address_align_bytes = 32}], [0], [], [<0, 0, 0, 0>]>} { func.func @forward(%arg0: tensor<64x128xf32>, %arg1: tensor<64x128xf32>) -> tensor<64x128xf32> {