- Physical overview of Tessel
- Pin information for Tessel (board version TM-00-04)
- Module usage, markings, and design philosophy
- Key ICs (integrated circuits) on Tessel and links to datasheets
- License information
Tessel is 2.559" (65 mm) long and 2.185" (55.5 mm) wide. These numbers include the USB port and module headers, which protrude an extra 0.059" (1 mm) and 0.630" (16 mm) from the board edge. Tessel is 0.472" tall (12 mm).
There are four 0.13" (3.3 mm) diameter mounting holes in the corners of the board, each 0.1" (2.54 mm) in from the edges. They are 2.359" (59.92 mm) and 1.375" (34.93 mm) apart in the horizontal and vertical dimensions, respectively.
For the API interfaces of Tessel's pins and ports, see the Hardware API pin documentation.
Tessel is extensible via modules, which connect to the 10-pin, 0.1” (2.54 mm) right angle female headers on the main board.
- All pins use 3.3V logic.
- Module port names (A, B, C, and D) are located between the module headers.
- Adjacent module ports are currently spaced apart by 0.3” (7.62 mm).
- Pins are located 0.089” (2.22 mm) from the board edge.
The following is the pinout for a module port:
| Pin | Name | Notes |
|---|---|---|
| 1 | GND | Ground. Pins are marked with a circle. |
| 2 | 3V3 | 3.3 V power rail. The onboard regulator is rated to 3A. |
| 3 | SCL | I2C clock line. Ports A and B and the GPIO bank share a common I2C bus, as do ports C and D. |
| 4 | SDA | I2C data line. Ports A and B and the GPIO bank share a common I2C bus, as do ports C and D. |
| 5 | SCK | SPI clock line. Common for the entire board. |
| 6 | MISO | SPI master in/slave out. Common for the entire board. |
| 7 | MOSI | SPI master out/slave in. Common for the entire board. |
| 8 | GPIO1 / UART TX* | User-configurable general purpose input/output. Unique to each module port. / UART serial transmit. See note below. |
| 9 | GPIO2 / UART RX* | User-configurable general purpose input/output. Unique to each module port. / UART serial receive. See note below. |
| 10 | GPIO3 | User-configurable general purpose input/output. Unique to each module port. |
Note: Module ports A, B, and D have hardware UART. Port C and the GPIO bank do not support UART communication at the time of this writing, but software implementation of UART is planned. Software UART will likely operate at 9600 BAUD (much slower than hardware UART) and consume significant computational resources, so we advise using it only if absolutely necessary.
- The bank itself is marked with "GPIO" on both ends.
- 2 x 10 (20 pins total).
- 0.1” (2.54 mm) pin spacing.
- All pins use 3.3 V logic.
- Although it is not recommended, the bottom row of the GPIO bank (nearest the board edge) can be used as a module port (port E on the Tessel).
Pin numbers on the GPIO bank zig-zag back and forth along the length of the connector, starting with the GND pin. This pin is located on the outer edge of the board opposite the MicroUSB port and next to module port B.
| Pin | Name | Notes |
|---|---|---|
| 1 | GND | Ground |
| 2 | VIN | This is the input to the onboard 3.3 V regulator, and typically comes either from USB or an external battery. As such, its voltage can range from ~3.4 V to 15 V. Please read the Powering Tessel documentation before using this pin. It is not recommended as source of significant current and should not be used to power the board. |
| 3 | 3V3 | 3.3 V power rail. The onboard regulator is rated to 3 A. |
| 4 | A6 | ADC6. 10-bit ADC, referenced to GND and 3.3 V. Cannot function as anything else. |
| 5 | SCL | I2C clock line. Common for the entire board. |
| 6 | A5 | ADC5. 10-bit ADC, referenced to GND and 3.3 V. Cannot function as anything else. |
| 7 | SDA | I2C data line. Common for the entire board. |
| 8 | A4 | ADC5. 10-bit ADC, referenced to GND and 3.3 V. Reconfigurable as digital GPIO. |
| 9 | SCK | SPI clock line. Common for the entire board. |
| 10 | A3 | ADC4. 10-bit ADC, referenced to GND and 3.3 V. |
| 11 | MISO | SPI master in/slave out. Common for the entire board. |
| 12 | A2 | ADC3. 10-bit ADC, referenced to GND and 3.3 V. Reconfigurable as digital GPIO. |
| 13 | MOSI | SPI master out/slave in. Common for the entire board. |
| 14 | A1 | ADC2. 10-bit ADC, referenced to GND and 3.3 V. Reconfigurable as 10-bit DAC. |
| 15 | G1 | GPIO1. User-configurable general purpose input/output. Planned as software UART TX. |
| 16 | G6 | GPIO6. User-configurable general purpose input/output. |
| 17 | G2 | GPIO2. User-configurable general purpose input/output. Planned as software UART RX. |
| 18 | G5 | GPIO5. User-configurable general purpose input/output. |
| 19 | G3 | GPIO3. User-configurable general purpose input/output. |
| 20 | G4 | GPIO4. User-configurable general purpose input/output. |
In order to communicate with external hardware using SPI, I2C, or UART, you will need to connect your external device to power, ground, and the appropriate communication channels:
SPI: SPI uses SCK (clock), MISO (master in/slave out), and MOSI (master out/slave in). SPI communication is shared across the entire board.
I2C: I2C uses SCL (clock) and SDA (data). There are two I2C buses on Tessel. One is shared by ports A, B, and the GPIO bank. The other is shared by ports C and D.
UART: Read the datasheet of your part in order to match properly; not all UART connections are labeled in the same way. Tessel's pins are named with respect to the Tessel, so TX transmits out from the Tessel board, and RX receives into the main Tessel board. Module ports A, B, and D each have their own UART, as does the GPIO bank. Module port C does not have UART (pending a software UART).
See the Hardware API documentation for software interfaces for SPI, I2C, and UART.
Tessel includes a pair of pins for powering the board from a non-USB power source. These pins, referred to as the "VIN headers" are adjacent to the USB port. Please read the Powering Tessel documentation before using these pins.
Tessel also includes a number of pins and pads which can be used to access the hardware at a lower level. These features are not intended for normal use and are not populated by default. They include:
- Breakouts for the Reset and Config buttons (T7 and T1, respectively). Wiring in to these pins allows the user to control these inputs electronically.
- JTAG headers (0.05" pitch, 2x5 grid), located between the LPC1830 and Module Ports A and B. JTAG is a common in-circuit debugging and programming tool.
- A six-pin, 0.05" pitch debug header for the CC3000. Pinout (pin 1 is closest to Module Ports C and D, pin 6 is nearest the LPC):
- CS
- MISO
- IRQ
- MOSI
- SCK
- Enable
- A footprint for an MMCX connector (small, robust, coaxial RF). Populating this connector and moving C18 to C28 allows the use of an external antenna. We recommend also buying an MMCX-to-SMA adaptor cable and 2.4 GHz SMA antenna.
- Unexposed traces connected to a debug UART port on the CC3000. Please post in the forums or contact us if you think you need access to these pins, as accessing them is non-trivial.
A hardware overview of all first-party modules can be found here.
Module can be plugged into any module port and installed using Node Package Manager via the command line. Note that the BLE, GPRS, and Camera modules should not be used on Module Port C if possible due to their reliance on UART.
Although modules may occupy more than one physical port (such as the RFID and GPRS modules), they typically only use the electrical connections on one port. The other will be broken out to another header on the board.
The module name is the top of board, usually in the upper left corner (with the pin headers facing left). This is also the name of the module's npm software package and is the name of the corresponding repository on GitHub.
The bottom silkscreen has, from top left to bottom right:
- The module's symbol, used to identify it at a glance
- The module name (same as on the top)
- The module model number
- The module's peak (as opposed to average) current draw
- The URL for the Tessel website
Note: the Tessel's onboard 3.3 V regulator is rated to 3 A and that the typical base system requires between 150mA and 300mA depending on network usage and memory access. Putting parts of the Tessel into low power states to reduce power consumption is an area of active development.
Please note that the hexagon logo on each of the first-party modules is a trademark of Technical Machine. Although Technical Machine is still formulating third-party branding documentation and standards, at this time we request that our community reserves the hexagon for first-party and/or approved hardware.
The module ports each include power, I2C, SPI, and three GPIO lines, which allows for the design of modules of arbitrary complexity. Note that the I2C and SPI busses are shared; as such, it is recommended that modules communicate over SPI and GPIO whenever possible. Doing so will mitigate the risks of I2C address conflicts and allow for multiple instances of the same kind of module.
Modules should be devices with clear-cut functionality. That is to say, they should have a single, well-defined purpose or a set of closely related functions, rather than an eclectic mix of capabilities onboard. This requirement is designed to reduce complexity, cost, and power consumption and maximize reusability in hardware and software.
If you're thinking of rolling your own module (or Tessel-compatible microcontroller), drop us a line at team@technical.io. We'd love to talk!
- Datasheet
- User manual
- Cortex M3
- Clocked at 180 MHz
- Datasheet
- Clocked at 90 MHz
- Datasheet
- Clocked at 90 MHz
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